BEGIN:VCALENDAR VERSION:2.0 PRODID:-//wp-events-plugin.com//7.2.3.1//EN TZID:America/New_York X-WR-TIMEZONE:America/New_York BEGIN:VEVENT UID:137@mestcenter.org DTSTART;TZID=America/New_York:20191106T120000 DTEND;TZID=America/New_York:20191106T130000 DTSTAMP:20240901T192815Z URL:https://mestcenter.org/training/webinar-the-art-of-digital-design-usin g-field-programmable-gate-arrays-fpgas/ SUMMARY:Webinar: The Art Of Digital Design Using Field-Programmable Gate Ar rays (FPGAs) DESCRIPTION:To watch the recorded webinar\, click on the recording.\nPlay V ideo\nSpeaker:\nDr. Eslam Tawfik\, Ohio State University\nAbstract:\nDigit al design flow is a lengthy process that involves many steps to take the d esign from RTL to the system testing phase. The objective of this webinar is to demystify this field and provide in-depth understanding of the diffe rent transformations that occur in each design step\, and how these transf ormations can affect the final performance metrics. The webinar will focus on FPGAs as the target technology. FPGA is a very powerful technology to implement complex System on Chip (SoCs) in an efficient way and in extreme ly fast time to market. With the recent advancements in their architecture \, speed\, power efficiency\, and peripherals\, FPGAs breached almost ever y field from IoT to space and military applications.Specifically\, this we binar will focus on fundamental elements in the design process\, including HDL modeling\, event‑driven simulation\, synthesis\, timing analysis\, and FPGA architecture.\nSpeaker Bio:\nTawfik arrived at ESL after serving as an assistant professor at Benha University\, Egypt. He earned his Ph.D. in micro-nano electronics from INPG\, Grenoble\, France\, and his master ’s and bachelor’s degrees from Benha University\, Egypt\, in microelec tronics and data security. Along with various academic positions at leadin g international universities\, including Zewail City of Science\, Egypt\, and The American University in Cairo\, Tawfik held research engineering ro les at the Information Technology Institute (ITI) and Mentor Graphics.\n\n At ESL\, Tawfik leads the Secure Microelectronics and Artificial Intellige nce Circuits (SMART) Lab. \n \nZoom Information:\nJoin Zoom Meeting\nhttps ://ufl.zoom.us/j/904047693\n\nMeeting ID: 904 047 693\n\nOne tap mobile\n+ 16465588656\,\,904047693# US (New York)\n+16699006833\,\,904047693# US (Sa n Jose)\n\nDial by your location\n+1 646 558 8656 US (New York)\n+1 669 90 0 6833 US (San Jose)\nMeeting ID: 904 047 693\nFind your local number: htt ps://ufl.zoom.us/u/ab5VOI6m6G\n\nJoin by SIP\n904047693@zoomcrc.com\n\nJoi n by H.323\n162.255.37.11 (US West)\n162.255.36.11 (US East)\n221.122.88.1 95 (China)\n115.114.131.7 (India Mumbai)\n115.114.115.7 (India Hyderabad)\ n213.19.144.110 (EMEA)\n103.122.166.55 (Australia)\n209.9.211.110 (Hong Ko ng)\n64.211.144.160 (Brazil)\n69.174.57.160 (Canada)\n207.226.132.110 (Jap an)\nMeeting ID: 904 047 693\n\nJoin by Skype for Business\nhttps://ufl.zo om.us/skype/904047693 ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2022/0 8/ET.jpg CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VEVENT UID:133@mestcenter.org DTSTART;TZID=America/New_York:20191120T120000 DTEND;TZID=America/New_York:20191120T130000 DTSTAMP:20240901T193034Z URL:https://mestcenter.org/training/webinar-protecting-electronics-supply- chain-throughout-life-cycle/ SUMMARY:Webinar: Protecting Electronics Supply Chain Throughout Life Cycle DESCRIPTION:To watch the recorded webinar\, click on the recording.\nPlay V ideo \nSpeaker: \nDr. Mark Tehranipoor\, Intel Charles E. Young Preemine nce Endowed Chair Professor in Cybersecurity and the Chair of the Departme nt of Electrical and Computer Engineering (ECE) at the the University of F lorida\nAbstract:\nGrowing complexity of system-on-chip (SoC) and ever-inc reasing cost of IC fabrication have forced the semiconductor industry to s hift from a vertical business model to a horizontal model. In this model\, time-to-market and manufacturing costs are lowered through outsourcing an d design reuse. To be more specific\, SoC designers obtain licenses for th ird party intellectual property (3PIPs)\, design an SoC by integrating the 3PIPs with their own IPs\, and then outsource the SoC design to contract foundries and assemblies for fabrication\, test and packaging. With most o f these entities involved in design\, manufacturing\, integration\, and di stribution located across the globe\, original IP owners no longer have th e ability to monitor the entire process. The lack of trust and transparenc y/control has led to vulnerabilities such as IP piracy\, IC overproduction \, cloning\, tampering\, and more. To protect the supply chain from such v ulnerabilities\, academic and industry researchers have proposed many tech niques e.g.\, IP encryption\, logic obfuscation\, secure split test\, etc. However\, recent literature have pointed out to some of the limitations o f these approaches. In this webinar\, we will present complementary techni ques to provide an end-to-end solution to protecting electronic supply cha in.\n\n \;\nSpeaker Bio:\nMark M. Tehranipoor is currently the Intel C harles E. Young Preeminence Endowed Chair Professor in Cybersecurity and t he Chair of the Department of Electrical and Computer Engineering (ECE) at the the University of Florida. He is also currently serving as the Direct or for Florida Institute for Cybersecurity (FICS) Research\, Director for Edaptive Computing Inc. Transition Center (ECI-TC)\, Co-director for the A FOSR/AFRL Center of Excellence on Enabling Cyber Defense in Analog and Mix ed Signal Domain (CYAN)\, and Co-Director for the National Microelectronic Security Training Center (MEST). He also served as the Associate Chair fo r Research and Strategic Initiatives for the ECE Department from 2017-2019 and the Program Director of Cybersecurity in the Herbert Wertheim College of Engineering from 2019-2022. His current research projects include: har dware security and trust\, electronics supply chain security\, IoT securit y\, and reliable and testable VLSI design. Dr. Tehranipoor has published n umerous journal articles and refereed conference papers and has delivere d more than 220+ invited talks and keynote addresses. In addition\, he h as 15 patents issued\, and has published 13 books of which two are textboo ks. His projects have been sponsored by 50+ companies and Government agen cies.\n\nDr. Tehranipoor is a Fellow of IEEE\, Fellow of ACM\, Golden Core Member of IEEE Computer Society\, and Member of ACM SIGDA. He is also a m ember of the Connecticut Academy of Science and Engineering (CASE). He is a recipient of 14 best paper awards and nominations\, the 2009 NSF CAREER award\, the 2014 AFOSR MURI award on Nanoscale Security\, the 2008 IEEE Co mputer Society (CS) Meritorious Service award\, the 2012 and 2017 IEEE CS Outstanding Contribution\, the 2010 and 2016 IEEE TTTC/CS Most Successful Technical Event for co-founding and chairing HOST Symposium\, the 2018 IEE E HOST Hall of Fame Member\, the 2009 and 2014 UConn ECE Research Excellen ce award\, the 2012 UConn SOE Outstanding Faculty Advisor award\, the 2016 UF College of Engineering Excellence in Leadership award\, the 2016 UF EC E Research Excellence Award\, the 2020 UF’s College of Engineering Teach er/Scholar of the year award\, and the 2020 UF Innovation of the Year Awar d.\n\nHe serves on the program committee of more than a dozen leading conf erences and workshops. Prof. Tehranipoor served as the guest editor for JE TTA\, IEEE Design and Test of Computers\, ACM JETC\, and IEEE Computer Soc iety Computing Now. He served as Program Chair of the 2019 International T est Conference (ITC)\, Vice-program Chair of the 2018 ITC\, Program Chair of the 2007 IEEE Defect-Based Testing (DBT) workshop\, 2016 IEEE Internati onal Verification and Security Workshop (IVSW)\, Program Chair of the 2008 IEEE Defect and Data Driven Testing (D3T) workshop\, Co-program Chair of the 2008 International Symposium on Defect and Fault Tolerance in VLSI Sys tems (DFTS)\, General Chair for D3T-2009 and DFTS-2009\, and Vice-general Chair for NATW-2011\, General Chair for 2008-2009\, and 2021 IEEE HOST\, a nd General Chair for 2019-2021 IEEE PAINE Conference.\n\nOver the years\, he has led a number of major initiatives in the domain of microelectronics security and trust. He co-founded the IEEE International Symposium on Ha rdware-Oriented Security and Trust (HOST) and served as HOST-2008 and HOS T-2009 General Chair and continue to serve as Chair of the Steering Commit tee for HOST. He also co-founded IEEE Asian-HOST and the IEEE Internati onal Conference of Physical Assurance and Inspection of Electronics (PAINE ). Further\, he co-founded the Journal on Hardware and Systems Security ( HaSS) and currently serving as EIC for HaSS. He is also led development o f Trust-Hub sponsored by the National Science Foundation (NSF). He serve d as associate Editor-in-Chief (EIC) for IEEE Design and Test of Computers from 2012-2014. He is currently serving as an Associate Editor for IEEE D esign and Test of Computers\, JETTA\, Journal of Low Power Electronics (JO LPE)\, ACM Transactions for Design Automation of Electronic Systems (TODAE S)\, IEEE Transactions on Computers\, and IEEE Transactions on VLSI (TVLSI ). He has served as an IEEE Distinguished Speaker and an ACM Distinguished Speaker from 2010-2013. Further\, he served as an ambassador of cybersecu rity for IEEE from 2016-2020.\n\nPrior to joining University of Florida\, Dr. Tehranipoor served as the founding director of the Center for Hardware Assurance\, Security\, and Engineering (CHASE) and the Comcast Center of Excellence in Security Innovation (CSI) at the University of Connecticut. \n \nZoom Information:\nJoin Zoom Meeting\nhttps://ufl.zoom.us/j/904047693 \n\nMeeting ID: 904 047 693\n\nOne tap mobile\n+16465588656\,\,904047693# US (New York)\n+16699006833\,\,904047693# US (San Jose)\n\nDial by your lo cation\n+1 646 558 8656 US (New York)\n+1 669 900 6833 US (San Jose)\nMeet ing ID: 904 047 693\nFind your local number: https://ufl.zoom.us/u/ab5VOI6 m6G\n\nJoin by SIP\n904047693@zoomcrc.com\n\nJoin by H.323\n162.255.37.11 (US West)\n162.255.36.11 (US East)\n221.122.88.195 (China)\n115.114.131.7 (India Mumbai)\n115.114.115.7 (India Hyderabad)\n213.19.144.110 (EMEA)\n10 3.122.166.55 (Australia)\n209.9.211.110 (Hong Kong)\n64.211.144.160 (Brazi l)\n69.174.57.160 (Canada)\n207.226.132.110 (Japan)\nMeeting ID: 904 047 6 93\n\nJoin by Skype for Business\nhttps://ufl.zoom.us/skype/904047693 ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2022/0 8/MT.jpg CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VEVENT UID:134@mestcenter.org DTSTART;TZID=America/New_York:20191204T120000 DTEND;TZID=America/New_York:20191204T130000 DTSTAMP:20240911T212513Z URL:https://mestcenter.org/training/introduction-to-hardware-obfuscation/ SUMMARY:Webinar: Introduction to Hardware Obfuscation DESCRIPTION:To watch the recorded webinar\, click on the recording.\nPlay V ideo \nSpeaker: \nDr. Domenic Forte\, Associate Professor and the Steven A. Yatauro Faculty Fellow in the Electrical and Computer Engineering (ECE ) Department at the University of Florida\nAbstract:\nToday’s integrated circuits (ICs) and systems are at greater risk during design\, fabricatio n\, test\, and post-deployment stages than ever before. Semiconductor glob alization and outsourcing facilitates intellectual property (IP) piracy\, insertion of malicious circuits (i.e.\, hardware Trojans)\, and illegal ma nufacturing of ICs (i.e.\, overproduction). Further\, with advances in the capabilities/automation of failure analysis (FA) tools/software\, it is b ecoming easier to reverse engineer critical IP\, extract proprietary secre ts\, and launch attacks against critical missions and infrastructure. Thes e are serious issues for government\, industry\, and society. Hardware obf uscation consists of techniques that lock and/or conceal the intent of und erlying semiconductor IP in order to hinder these threats. In this webinar \, the following topics will be covered: (1) Overview of the IC design flo w and threat models\; (2) Summary of naïve protection approaches and thei r limitations\; (3) Introduction to hardware obfuscation variants\, applic ations/use cases\, popular metrics\, and other considerations\; and (4) In troduction to non-invasive\, invasive\, and semi-invasive attacks on hardw are obfuscation.\nSpeaker Bio:\nI am currently an Associate Professor and the Steven A. Yatauro Faculty Fellow in the Electrical and Computer Engine ering (ECE) Department at the University of Florida. Previously\, I was an Assistant Professor in the Electrical and Computer Engineering (ECE) Depa rtment at the University of Connecticut. I received my PhD in Electrical a nd Computer Engineering from the University of Maryland in 2013. My curren t research focuses on:\n\n Counterfeit Electronics Detection and Avoidanc e\n Hardware Security Primitives\n Hardware Trojan Detection and Prevent ion\n Nanoscale Integration Challenges\n Reverse Engineering and Anti-re verse Engineering\n Computer-Aided Design (CAD) Tools\, Metrics\, and Rul es for Hardware Security\n Biometric Authentication\n\nPast projects of m ine include Dynamic Energy and Thermal management in Distributed Systems a nd Green Computing in Large-Scale Datacenters. \n \nZoom Information:\nJoi n Zoom Meeting\nhttps://ufl.zoom.us/j/904047693\n\nMeeting ID: 904 047 693 \n\nOne tap mobile\n+16465588656\,\,904047693# US (New York)\n+16699006833 \,\,904047693# US (San Jose)\n\nDial by your location\n+1 646 558 8656 US (New York)\n+1 669 900 6833 US (San Jose)\nMeeting ID: 904 047 693\nFind y our local number: https://ufl.zoom.us/u/ab5VOI6m6G\n\nJoin by SIP\n9040476 93@zoomcrc.com\n\nJoin by H.323\n162.255.37.11 (US West)\n162.255.36.11 (U S East)\n221.122.88.195 (China)\n115.114.131.7 (India Mumbai)\n115.114.115 .7 (India Hyderabad)\n213.19.144.110 (EMEA)\n103.122.166.55 (Australia)\n2 09.9.211.110 (Hong Kong)\n64.211.144.160 (Brazil)\n69.174.57.160 (Canada)\ n207.226.132.110 (Japan)\nMeeting ID: 904 047 693\n\nJoin by Skype for Bus iness\nhttps://ufl.zoom.us/skype/904047693 ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2022/0 8/DF.jpg CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VEVENT UID:138@mestcenter.org DTSTART;TZID=America/New_York:20200115T120000 DTEND;TZID=America/New_York:20200115T130000 DTSTAMP:20240911T212621Z URL:https://mestcenter.org/training/webinar-physical-assurance-and-inspect ion-of-electronics/ SUMMARY:Webinar: Physical Assurance and Inspection of Electronics DESCRIPTION:To watch the recorded webinar\, click on the recording.\nPlay V ideo \nSpeaker: \nDr. Navid Asadi\, Assistant Professor at University of Florida\nAbstract:\nGlobalization has made the semiconductor industry mor e susceptible to trust and security issues. Hardware Trojans\, i.e.\, mali cious modification to electronic systems\, can violate the root of trust w hen the device or systems are fabricated/assembled in untrusted facilities . As the imaging and failure analysis tools excel in the resolution and ca pability\, physical inspection-based methods become more attractive in ver ifying such trust issues. On the contrary\, such physical inspection metho ds are opening new capabilities for an adversary to extract sensitive info rmation like secret keys\, memory content or intellectual property (IP) co mpromising confidentiality and integrity. Different countermeasures have b een proposed\, however\, there are still many unanswered questions. This t alk will focus on the state-of-the-art physical inspection/assurance metho ds\, the existing countermeasures\, related challenges to develop new coun termeasures and a research roadmap for this emerging field.\nSpeaker Bio:\ nNavid Asadi is an assistant professor in the department of electrical and computer engineering at university of Florida. His research is mainly foc used on physical inspection of electronics from device to system level. He  investigates novel techniques for integrated circuits counterfeit detect ion/prevention\, system and chip level reverse engineering\, anti-reverse engineering\, invasive and semi-invasive physical attacks\, integrity anal ysis\, etc. using advanced inspection methods including but not limited to 3D X-ray microscopy\, Optical imaging\, scanning electron microscopy (SEM )\, focused ion beams (FIBs)\, THz imaging\, etc. in combination with imag e processing and machine learning algorithms to make the inspection proces s intelligent and independent from human. He has recived several best pape r awards and is the co-founder of IEEE-PAINE conference. \n \nZoom Informa tion:\nJoin Zoom Meeting\nhttps://ufl.zoom.us/j/904047693\n\nMeeting ID: 9 04 047 693\n\nOne tap mobile\n+16465588656\,\,904047693# US (New York)\n+1 6699006833\,\,904047693# US (San Jose)\n\nDial by your location\n+1 646 55 8 8656 US (New York)\n+1 669 900 6833 US (San Jose)\nMeeting ID: 904 047 6 93\nFind your local number: https://ufl.zoom.us/u/ab5VOI6m6G\n\nJoin by SI P\n904047693@zoomcrc.com\n\nJoin by H.323\n162.255.37.11 (US West)\n162.25 5.36.11 (US East)\n221.122.88.195 (China)\n115.114.131.7 (India Mumbai)\n1 15.114.115.7 (India Hyderabad)\n213.19.144.110 (EMEA)\n103.122.166.55 (Aus tralia)\n209.9.211.110 (Hong Kong)\n64.211.144.160 (Brazil)\n69.174.57.160 (Canada)\n207.226.132.110 (Japan)\nMeeting ID: 904 047 693\n\nJoin by Sky pe for Business\nhttps://ufl.zoom.us/skype/904047693 ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2022/0 8/NA.jpg CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VEVENT UID:162@mestcenter.org DTSTART;TZID=America/New_York:20200205T120000 DTEND;TZID=America/New_York:20200205T130000 DTSTAMP:20240911T212739Z URL:https://mestcenter.org/training/webinar-hardware-security-verification -using-formal-methods/ SUMMARY:Webinar: Hardware Security Verification Using Formal Methods DESCRIPTION:To watch the recorded webinar\, click on the recording.\nPlay V ideo \nSpeaker: \nDr. Prabhat Mishra\, Professor in the Department of Co mputer and Information Science and Engineering at the University of Florid a\nAbstract:\n \;\nSpeaker Bio:\nPrabhat Mishra is a Professor in the Department of Computer and Information Science and Engineering at the Univ ersity of Florida. He received his Ph.D. in Computer Science and Engineeri ng from the University of California at Irvine in 2004. His research has b een recognized by several awards including the NSF CAREER Award\, IBM Facu lty Award\, three Best Paper Awards\, and EDAA Outstanding Dissertation Aw ard. Prof. Mishra is an ACM Distinguished Scientist and a Senior Member of IEEE. \n \nZoom Information:\nJoin Zoom Meeting\nhttps://ufl.zoom.us/j/90 4047693\n\nMeeting ID: 904 047 693\n\nOne tap mobile\n+16465588656\,\,9040 47693# US (New York)\n+16699006833\,\,904047693# US (San Jose)\n\nDial by your location\n+1 646 558 8656 US (New York)\n+1 669 900 6833 US (San Jose )\nMeeting ID: 904 047 693\nFind your local number: https://ufl.zoom.us/u/ ab5VOI6m6G\n\nJoin by SIP\n904047693@zoomcrc.com\n\nJoin by H.323\n162.255 .37.11 (US West)\n162.255.36.11 (US East)\n221.122.88.195 (China)\n115.114 .131.7 (India Mumbai)\n115.114.115.7 (India Hyderabad)\n213.19.144.110 (EM EA)\n103.122.166.55 (Australia)\n209.9.211.110 (Hong Kong)\n64.211.144.160 (Brazil)\n69.174.57.160 (Canada)\n207.226.132.110 (Japan)\nMeeting ID: 90 4 047 693\n\nJoin by Skype for Business\nhttps://ufl.zoom.us/skype/9040476 93 ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2022/0 8/prabhat-2018-scaled.jpg CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VEVENT UID:139@mestcenter.org DTSTART;TZID=America/New_York:20200219T120000 DTEND;TZID=America/New_York:20200219T130000 DTSTAMP:20240911T212826Z URL:https://mestcenter.org/training/webinar-why-cad-automation-is-needed-f or-hw-security/ SUMMARY:Webinar: Why CAD/Automation is Needed for HW Security DESCRIPTION:To watch the recorded webinar\, click on the recording.\nPlay V ideo \nSpeaker: \nDr. Farimah Farahmandi\, assistant professor in the De partment of Electrical and Computer Engineering (ECE) and the associate di rector of Edaptive Computing Inc.\, Transition Center (ECI-TC) at the Univ ersity of Florida\nAbstract:\nThe goal of this webinar is to present vulne rabilities introduced during various stages of design life-cycle\, CAD too ls and methodologies for security assessment and detecting security vulner abilities\, countermeasure tools and methodologies for addressing each vul nerability\, and challenges and research roadmap ahead.\nSpeaker Bio:\nDr. Farahmandi is an assistant professor in the Department of Electrical and Computer Engineering (ECE) and the associate director of Edaptive Computin g Inc.\, Transition Center (ECI-TC) at the University of Florida. She rece ived her Ph.D. from the Department of Computer and Information Science and Engineering (CISE) at the University of Florida\, 2018.  Her research in terests include hardware security verification\, formal methods\, fault-in jection attack analysis\, side-channel leakage assessment\,  information leakage\, secure physical design\,  secure supply chain of microelectroni cs\, and post-silicon validation and debug. Her research has resulted in f our books\, nine book chapters\, and several publications in premier ACM/I EEE journals and conferences including IEEE Transactions on Computers\, IE EE Transactions on CAD\, Design Automation Conference (DAC)\, and Design A utomation and Test in Europe (DATE). Her research has been recognized by s everal awards including IEEE System Validation and Debug Technology Commit tee Student Research Award\, Gartner Group Info-Tech Scholarship\, a nomin ation for the Best Paper Award in ASPDAC 2017\, and DAC Richard Newton You ng Student Fellowship. She currently serves as an Associate Editor of IET Computers &\; Digital Techniques. She also has served on many technical program committees as well as organizing committees of premier ACM and IE EE conferences. Currently\, she is vice program chair of IEEE HOST 2021. H er research has been sponsored by SRC\, DARPA\, AFRL\, DoD\, Analog Device s\, ANSYS\, and Cisco. She is a member of IEEE and ACM. \n \nZoom Informat ion:\nJoin Zoom Meeting\nhttps://ufl.zoom.us/j/904047693\n\nMeeting ID: 90 4 047 693\n\nOne tap mobile\n+16465588656\,\,904047693# US (New York)\n+16 699006833\,\,904047693# US (San Jose)\n\nDial by your location\n+1 646 558 8656 US (New York)\n+1 669 900 6833 US (San Jose)\nMeeting ID: 904 047 69 3\nFind your local number: https://ufl.zoom.us/u/ab5VOI6m6G\n\nJoin by SIP \n904047693@zoomcrc.com\n\nJoin by H.323\n162.255.37.11 (US West)\n162.255 .36.11 (US East)\n221.122.88.195 (China)\n115.114.131.7 (India Mumbai)\n11 5.114.115.7 (India Hyderabad)\n213.19.144.110 (EMEA)\n103.122.166.55 (Aust ralia)\n209.9.211.110 (Hong Kong)\n64.211.144.160 (Brazil)\n69.174.57.160 (Canada)\n207.226.132.110 (Japan)\nMeeting ID: 904 047 693\n\nJoin by Skyp e for Business\nhttps://ufl.zoom.us/skype/904047693 ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2022/0 8/FF.jpg CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VEVENT UID:140@mestcenter.org DTSTART;TZID=America/New_York:20200304T120000 DTEND;TZID=America/New_York:20200304T130000 DTSTAMP:20240911T213102Z URL:https://mestcenter.org/training/webinar-architecture-level-vulnerabili ties/ SUMMARY:Webinar: Architecture Level Vulnerabilities DESCRIPTION:To watch the recorded webinar\, click on the recording.\nPlay V ideo \nSpeaker:\nDr. Radu Teodorescu\, Professor in the Department of Com puter Science and Engineering at Ohio State University\nAbstract:\nThis we binar introduces the newly discovered transient execution attacks that exp loit various forms of speculation employed in modern processors. We discus s the architectural design features that have enabled these attacks\, outl ine some of the software patches that have been deployed as mitigations\, review their impact on system performance\, and we present architectural d esign changes aimed at preventing.\nSpeaker Bio:\nRadu Teodorescu is a Pro fessor in the Department of Computer Science and Engineering at Ohio State University where he leads the Computer Architecture Research Lab. He re ceived a Ph.D. in Computer Science from University of Illinois at Urbana -Champaign in 2008. He was the recipient of the CSE Department Teaching Aw ard in 2021\, a Lumley Award in 2014\, an NSF CAREER award in 2012\, an I ntel Foundation Fellowship in 2007-2008 and the W. J. Poppelbaum Award for 2008. \n \nZoom Information:\nJoin Zoom Meeting\nhttps://ufl.zoom.us/j/90 4047693\n\nMeeting ID: 904 047 693\n\nOne tap mobile\n+16465588656\,\,9040 47693# US (New York)\n+16699006833\,\,904047693# US (San Jose)\n\nDial by your location\n+1 646 558 8656 US (New York)\n+1 669 900 6833 US (San Jose )\nMeeting ID: 904 047 693\nFind your local number: https://ufl.zoom.us/u/ ab5VOI6m6G\n\nJoin by SIP\n904047693@zoomcrc.com\n\nJoin by H.323\n162.255 .37.11 (US West)\n162.255.36.11 (US East)\n221.122.88.195 (China)\n115.114 .131.7 (India Mumbai)\n115.114.115.7 (India Hyderabad)\n213.19.144.110 (EM EA)\n103.122.166.55 (Australia)\n209.9.211.110 (Hong Kong)\n64.211.144.160 (Brazil)\n69.174.57.160 (Canada)\n207.226.132.110 (Japan)\nMeeting ID: 90 4 047 693\n\nJoin by Skype for Business\nhttps://ufl.zoom.us/skype/9040476 93 ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2022/0 8/RT.jpg CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VEVENT UID:141@mestcenter.org DTSTART;TZID=America/New_York:20200318T120000 DTEND;TZID=America/New_York:20200318T130000 DTSTAMP:20240911T213517Z URL:https://mestcenter.org/training/webinar-blockchain-for-electronics-sup ply-chain-integrity/ SUMMARY:Webinar: Blockchain for Electronics Supply Chain Integrity DESCRIPTION:To watch the recorded webinar\, click on the recording.\nPlay V ideo \nSpeaker: \nDr. Fahim Rahman\, Research Assistant Professor with t he Electrical and Computer Engineering Department\, University of Florida. \nAbstract:\nThe goal of this webinar is to understand and learn threats a nd vulnerabilities introduced in current electronic supply chain\; emergin g blockchain and distributed ledger framework targeted for data integrity\ , techniques for developing blockchain-based framework for enabling electr onic supply chain integrity\, and challenges and research roadmap ahead.\n Speaker Bio:\nFahim Rahman is currently a Research Assistant Professor wit h the Electrical and Computer Engineering Department\, University of Flori da\, Gainesville\, FL\, USA. He received his Ph.D. in electrical and compu ter engineering from the University of Florida\, Gainesville\, USA in 2018 . He received his BS in electrical and electronic engineering from Banglad esh University of Engineering and Technology\, Bangladesh and MS in electr ical and computer engineering from the University of Connecticut\, USA in 2015\, respectively. His current research is in the domain of hardware and cybersecurity and trust including investigation of hardware security prim itives\, CAD for security and automatic assessment\, FPGA security\, elect ronic supply-chain security\, and hardware-assisted cybersecurity. He publ ished 3 book chapters and 15+ peer-reviewed papers. His research has been sponsored by SRC\, AFOSR\, AFRL\, DARPA\, Cisco\, TI\, and NIST. He is a m ember of IEEE and ACM. \n \nZoom Information:\nJoin Zoom Meeting\nhttps:// ufl.zoom.us/j/904047693\n\nMeeting ID: 904 047 693\n\nOne tap mobile\n+164 65588656\,\,904047693# US (New York)\n+16699006833\,\,904047693# US (San J ose)\n\nDial by your location\n+1 646 558 8656 US (New York)\n+1 669 900 6 833 US (San Jose)\nMeeting ID: 904 047 693\nFind your local number: https: //ufl.zoom.us/u/ab5VOI6m6G\n\nJoin by SIP\n904047693@zoomcrc.com\n\nJoin b y H.323\n162.255.37.11 (US West)\n162.255.36.11 (US East)\n221.122.88.195 (China)\n115.114.131.7 (India Mumbai)\n115.114.115.7 (India Hyderabad)\n21 3.19.144.110 (EMEA)\n103.122.166.55 (Australia)\n209.9.211.110 (Hong Kong) \n64.211.144.160 (Brazil)\n69.174.57.160 (Canada)\n207.226.132.110 (Japan) \nMeeting ID: 904 047 693\n\nJoin by Skype for Business\nhttps://ufl.zoom. us/skype/904047693 ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2022/0 5/Fahim-Rahman.jpeg CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VEVENT UID:143@mestcenter.org DTSTART;TZID=America/New_York:20200401T120000 DTEND;TZID=America/New_York:20200401T130000 DTSTAMP:20240911T213704Z URL:https://mestcenter.org/training/webinar-security-and-forensics-in-the- iot-era-from-reverse-engineering-to-honeyiot/ SUMMARY:Webinar: Security and Forensics in the IoT Era: From Reverse Engine ering to HoneyIoT DESCRIPTION:To watch the recorded webinar\, click on the recording.\nPlay V ideo \nSpeaker:\nDr. Yier Jin\nAbstract:\nThis webinar will first introdu ce the emerging security and privacy challenges in the IoT domain. Then fo cus on the bottom-up solutions on IoT protection and will present our rece nt research effort in microarchitecture supported IoT runtime attack detec tion and device attestation. The developed methods will lead to a design-f or-security flow towards trusted IoT and their applications. \n \nZoom Inf ormation:\nJoin Zoom Meeting\nhttps://ufl.zoom.us/j/904047693\n\nMeeting I D: 904 047 693\n\nOne tap mobile\n+16465588656\,\,904047693# US (New York) \n+16699006833\,\,904047693# US (San Jose)\n\nDial by your location\n+1 64 6 558 8656 US (New York)\n+1 669 900 6833 US (San Jose)\nMeeting ID: 904 0 47 693\nFind your local number: https://ufl.zoom.us/u/ab5VOI6m6G\n\nJoin b y SIP\n904047693@zoomcrc.com\n\nJoin by H.323\n162.255.37.11 (US West)\n16 2.255.36.11 (US East)\n221.122.88.195 (China)\n115.114.131.7 (India Mumbai )\n115.114.115.7 (India Hyderabad)\n213.19.144.110 (EMEA)\n103.122.166.55 (Australia)\n209.9.211.110 (Hong Kong)\n64.211.144.160 (Brazil)\n69.174.57 .160 (Canada)\n207.226.132.110 (Japan)\nMeeting ID: 904 047 693\n\nJoin by Skype for Business\nhttps://ufl.zoom.us/skype/904047693 ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2022/0 8/YJ.jpg CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VEVENT UID:167@mestcenter.org DTSTART;TZID=America/New_York:20200415T120000 DTEND;TZID=America/New_York:20200415T130000 DTSTAMP:20250708T155847Z URL:https://mestcenter.org/training/live-online-panel-state-of-the-microel ectronics-design-and-security/ SUMMARY:Live online panel: State of the Microelectronics Design and Securit y DESCRIPTION:To watch the recorded panel\, click on the recording.\nPlay Vid eo\nSpeakers: \nLen Orlando\, AFRL\; Serge Leef\, DARPA/Microsoft\; Dr. G reg Creech\, GLC\; Dr. Matt Casto\, OSD/MINSEC/Genie Company\nAbstract:\nT his panel intends to keep the microelectronics design and security communi ty up to date on the status of existing initiatives\, new initiatives\, a nd discuss new ideas to pursue collaboration between government\, industry \, and academia both in research and workforce development.\nSpeaker Bio:\ nDr. Matthew Casto:\n\nExtensive background with leadership in basic\, app lied\, and advanced research and development as well as agile innovation t o exploit and achieve rapid technological advantages. Prior to joining Gen ie\, served as Chief for the Aerospace Components and Subsystems Division in the Air Force Research Laboratory’s (AFRL) Sensors Directorate\, Wrig ht Patterson Air Force Base\, and led the discovery\, development\, and in tegration of aerospace components and subsystems for affordable sensor and countermeasure technologies for air and space force warfighters. Has held numerous technical leadership positions throughout career including Direc tor for the DoD Trusted and Assured Microelectronics (T&\;AM) Program a nd Microelectronics Innovation for National Security and Economic Competit iveness (MINSEC) Initiative and the Department of the Air Force Senior Str ategic Advisor for Microelectronics Innovation\, both at the Pentagon.\n\n Earned BS and MS degrees in Electrical Engineering from Wright State Unive rsity\, and a PhD in Electrical and Computer Engineering from The Ohio Sta te University. A standing Senior Member of the Institute of Electrical and Electronics Engineers\, and has authored 50+ publications\, patents\, and invited talks on Microelectronics\, Semi-Conductors\, and Advanced Electr onics Technology. 2020 Inductee and member of IEEE HOST Hall of Fame.\n\n\ n\nLen Orlando\, (AFRL):\n\n\n\nDr. Greg Creech:\n\n\n\nSerge Leef\, Micro soft:\n\nAfter 4 years of national service at DARPA\, Serge Leef joined Mi crosoft's Azure business in March of 2022 to pursue the vision of cloud ba sed secure microelectronics design\, implementation\, and fabrication enab lement.\n\nAt DARPA\, Serge was responsible for Secure Silicon\, Next Gene ration Design Tools\, and Domestic Microelectronics program portfolio.\n\n Prior to the DARPA appointment\, Serge worked at Siemens EDA (formerly Men tor Graphics)\, where from 2010 until 2018 he was a Vice President of New Ventures\, responsible for identifying and developing technology and busin ess opportunities in systems-oriented markets. Additionally\, from 1999 to 2018\, he served as a division General Manager\, responsible for defining strategies and building successful businesses around design automation pr oducts in the areas of hardware/software co-design\, multi-physics simulat ion\, IP integration\, SoC optimization\, design data management\, automot ive/aerospace networking\, cloud-based electronic design\, Internet of Thi ngs (IoT) infrastructure\, and hardware cybersecurity.\n\nPrior to joining Mentor\, he was responsible for design automation at Silicon Graphics\, w here he and his team created revolutionary\, high-speed simulation tools t o enable the design of high-speed 3D graphics chips\, which defined the st ate-of-the-art in visualization\, imaging\, gaming\, and special effects f or a decade. Earlier in his career\, he managed a CAE/CAD organization at Microchip and developed functional and physical design and verification to ols for major 8- and 16-bit microcontroller and microprocessor programs at Intel.\n\nSerge received his Bachelor of Science degree in electrical eng ineering and Master of Science degree in computer science from Arizona Sta te University. He has served on corporate\, state\, and academic advisory boards\, delivered numerous public speeches\, and holds patents in hardwar e Trojan detection and Internet of Things (loT) infrastructure.\n\n\n\n\n& nbsp\;\n\n \n \nZoom Information:\nJoin Zoom Meeting\nhttps://ufl.zoom.us/ j/904047693\n\nMeeting ID: 904 047 693\n\nOne tap mobile\n+16465588656\,\, 904047693# US (New York)\n+16699006833\,\,904047693# US (San Jose)\n\nDial by your location\n+1 646 558 8656 US (New York)\n+1 669 900 6833 US (San Jose)\nMeeting ID: 904 047 693\nFind your local number: https://ufl.zoom.u s/u/ab5VOI6m6G\n\nJoin by SIP\n904047693@zoomcrc.com\n\nJoin by H.323\n162 .255.37.11 (US West)\n162.255.36.11 (US East)\n221.122.88.195 (China)\n115 .114.131.7 (India Mumbai)\n115.114.115.7 (India Hyderabad)\n213.19.144.110 (EMEA)\n103.122.166.55 (Australia)\n209.9.211.110 (Hong Kong)\n64.211.144 .160 (Brazil)\n69.174.57.160 (Canada)\n207.226.132.110 (Japan)\nMeeting ID : 904 047 693\n\nJoin by Skype for Business\nhttps://ufl.zoom.us/skype/904 047693 CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VEVENT UID:142@mestcenter.org DTSTART;TZID=America/New_York:20200506T120000 DTEND;TZID=America/New_York:20200506T130000 DTSTAMP:20240911T213911Z URL:https://mestcenter.org/training/webinar-computer-vision-for-hw-securit y/ SUMMARY:Webinar: Computer Vision for HW Security DESCRIPTION:To watch the recorded webinar\, click on the recording.\nPlay V ideo \nSpeaker: \nDr. Damon Woodard\, Director of the Florida Institute for National Security (FINS)\, Associate Professor within the Electrical a nd Computer Engineering Department at the University of Florida\nAbstract: \nThis webinar will first provide an overview of computer vision and conve ntional methods that have been applied to hardware security problems. Also \, a detailed discussion of two examples of computer vision-enabled hardwa re security applications\, automated hardware trojan detection and reverse engineering\, using SEM imagery will be provided.\nSpeaker Bio:\nDr. Wood ard currently serves as the Director of the Florida Institute for National Security (FINS). He is an Associate Professor within the Electrical and C omputer Engineering Department at the University of Florida and directs th e Applied Artificial Intelligence Group. He is an IEEE Senior Member\, an ACM Senior Member\, a National Academy of Science Kavli Frontiers Fellow\, and a member of the Association for the Advancement of Artificial Intelli gence (AAAI). Dr. Woodard received his Ph.D. in Computer Science and Engin eering from the University of Notre Dame\, his M.E. in Computer Science an d Engineering from Penn State University\, and his B.S. in Computer Scienc e and Computer Information Systems from Tulane University.\n\nBefore becom ing a faculty member\, Dr. Woodard was a Director of Central Intelligence postdoctoral fellow. His postdoctoral research focused on developing advan ced iris recognition systems using high-resolution sensors. His research i nterests include biometrics/identity science and applied artificial intell igence (machine learning\, deep learning\, reinforcement learning\, comput er vision\, and natural language processing). His current research project s include authorship attribution (stylometry) / computational behavioral a nalytics via text analytics and natural language processing\, image analys is/machine learning-based hardware assurance (hardware trojan detection\, counterfeit electronics detection)\, and adversarial machine learning (Dee pFake detection). \n \nZoom Information:\nJoin Zoom Meeting\nhttps://ufl.z oom.us/j/904047693\n\nMeeting ID: 904 047 693\n\nOne tap mobile\n+16465588 656\,\,904047693# US (New York)\n+16699006833\,\,904047693# US (San Jose)\ n\nDial by your location\n+1 646 558 8656 US (New York)\n+1 669 900 6833 U S (San Jose)\nMeeting ID: 904 047 693\nFind your local number: https://ufl .zoom.us/u/ab5VOI6m6G\n\nJoin by SIP\n904047693@zoomcrc.com\n\nJoin by H.3 23\n162.255.37.11 (US West)\n162.255.36.11 (US East)\n221.122.88.195 (Chin a)\n115.114.131.7 (India Mumbai)\n115.114.115.7 (India Hyderabad)\n213.19. 144.110 (EMEA)\n103.122.166.55 (Australia)\n209.9.211.110 (Hong Kong)\n64. 211.144.160 (Brazil)\n69.174.57.160 (Canada)\n207.226.132.110 (Japan)\nMee ting ID: 904 047 693\n\nJoin by Skype for Business\nhttps://ufl.zoom.us/sk ype/904047693 ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2022/0 8/DW.jpg CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VEVENT UID:144@mestcenter.org DTSTART;TZID=America/New_York:20200520T120000 DTEND;TZID=America/New_York:20200520T130000 DTSTAMP:20240901T193239Z URL:https://mestcenter.org/training/webinar-asynchronous-design-and-hw-sec urity/ SUMMARY:Webinar: Asynchronous Design and HW Security DESCRIPTION:To watch the recorded webinar\, click on the recording.\nPlay V ideo \nSpeaker:\nWilliam Koven\, Chip Lead at Facebook\nAbstract:\nThis w ebinar will provide an overview of the most common asynchronous design tec hniques and their Power\, Performance\, Area\, and Security (PPAS) tradeof fs with a focus on information leakage. This webinar will conclude with re commendations on when certain asynchronous approaches may be appropriate a nd provide superior PPAS to traditional synchronous design\nSpeaker Bio:\n William Koven is a Galois research engineer. Previously he was co-founder and CEO of Reduced Energy Microsystems (REM)\, a company focused on low po wer\, high-performance edge computing. He received his B.S. in engineering from Harvey Mudd College\, where he was a Clay-Wolkin Fellow. Prior to co -founding REM\, William worked at AMD and at Intel in both product groups and Intel Labs. He has been involved in many production chip tapeouts as w ell as research chip development. He has also developed several novel asyn chronous circuit architectures and continues to be heavily involved in the asynchronous design community. \n \nZoom Information:\nJoin Zoom Meeting\ nhttps://ufl.zoom.us/j/904047693\n\nMeeting ID: 904 047 693\n\nOne tap mob ile\n+16465588656\,\,904047693# US (New York)\n+16699006833\,\,904047693# US (San Jose)\n\nDial by your location\n+1 646 558 8656 US (New York)\n+1 669 900 6833 US (San Jose)\nMeeting ID: 904 047 693\nFind your local numbe r: https://ufl.zoom.us/u/ab5VOI6m6G\n\nJoin by SIP\n904047693@zoomcrc.com\ n\nJoin by H.323\n162.255.37.11 (US West)\n162.255.36.11 (US East)\n221.12 2.88.195 (China)\n115.114.131.7 (India Mumbai)\n115.114.115.7 (India Hyder abad)\n213.19.144.110 (EMEA)\n103.122.166.55 (Australia)\n209.9.211.110 (H ong Kong)\n64.211.144.160 (Brazil)\n69.174.57.160 (Canada)\n207.226.132.11 0 (Japan)\nMeeting ID: 904 047 693\n\nJoin by Skype for Business\nhttps:// ufl.zoom.us/skype/904047693 ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2022/0 8/WK.jpg CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VEVENT UID:145@mestcenter.org DTSTART;TZID=America/New_York:20200603T120000 DTEND;TZID=America/New_York:20200603T130000 DTSTAMP:20240911T214036Z URL:https://mestcenter.org/training/webinar-system-level-design-of-secured -system-on-chips/ SUMMARY:Webinar: System-Level Design of Secured System-on-Chips DESCRIPTION:To watch the recorded webinar\, click on the recording.\nPlay V ideo \nSpeaker: \nDr. Christophe Bobda\, Professor at the University of Florida with the Department of Electrical and Computer Engineering\nAbstra ct:\nThis webinar addresses system-level-design of secured system-on-chips through a tighter integration of user-specified security requirements and objectives in the hardware/software design process.  The course will dis cuss generic models and tools to capture security rules and protocols that automatically generate the hardware/software security infrastructure.\nSp eaker Bio:\nProfessor Bobda received the Licence in mathematics from the U niversity of Yaounde\, Cameroon\, in 1992\, the diploma of computer scienc e and the Ph.D. degree (with honors) in computer science from the Universi ty of Paderborn in Germany in 1999 and 2003 (In the chair of Prof. Franz J . Rammig) respectively. In June 2003 he joined the department of computer science at the University of Erlangen-Nuremberg in Germany as Post doc\, u nder the direction of Prof Jürgen Teich. Dr. Bobda received the best di ssertation award 2003 from the University of Paderborn for his work on syn thesis of reconfigurable systems using temporal partitioning and temporal placement. In 2005 Dr. Bobda was appointed assistant professor at the Univ ersity of Kaiserslautern. There he set the chair for Self-Organizing Embed ded Systems that he led until October 2007. From 2007 to 2010 Dr. Bobda wa s Professor at the University of Potsdam and leader of The working Group C omputer Engineering.\n\nProfesor Bobda is Senior Member of the ACM. He is also in the program committee of several conferences (FPL\, FPT\, RAW\, RS P\, ERSA\, RECOSOC\, DRS)\, the DATE executive committee as proceedings ch air (2004\, 2005\, 2006\, 2007\, 2008\, 2009\, 2010). He served as reviewe r of several journals (IEEE TC\, IEEE TVLSI\, Elsevier Journal of Micropro cessor and Microsystems\, Integration the VLSI Journal) and conferences (D AC\, DATE\, FPL\, FPT\, SBCCI\, RAW\, RSP\, ERSA)\, as guest editor of the Elsevier Journal of Microprocessor and Microsystems and member of the edi torial board of the Hindawi International Journal of Reconfigurable Comput ing. Dr. Bobda is the author of one of the first most comprehensive books in the rapidly growing field of Reconfigurable Computing. \n \nZoom Inform ation:\nJoin Zoom Meeting\nhttps://ufl.zoom.us/j/904047693\n\nMeeting ID: 904 047 693\n\nOne tap mobile\n+16465588656\,\,904047693# US (New York)\n+ 16699006833\,\,904047693# US (San Jose)\n\nDial by your location\n+1 646 5 58 8656 US (New York)\n+1 669 900 6833 US (San Jose)\nMeeting ID: 904 047 693\nFind your local number: https://ufl.zoom.us/u/ab5VOI6m6G\n\nJoin by S IP\n904047693@zoomcrc.com\n\nJoin by H.323\n162.255.37.11 (US West)\n162.2 55.36.11 (US East)\n221.122.88.195 (China)\n115.114.131.7 (India Mumbai)\n 115.114.115.7 (India Hyderabad)\n213.19.144.110 (EMEA)\n103.122.166.55 (Au stralia)\n209.9.211.110 (Hong Kong)\n64.211.144.160 (Brazil)\n69.174.57.16 0 (Canada)\n207.226.132.110 (Japan)\nMeeting ID: 904 047 693\n\nJoin by Sk ype for Business\nhttps://ufl.zoom.us/skype/904047693 ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2022/0 8/CB.jpg CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VEVENT UID:146@mestcenter.org DTSTART;TZID=America/New_York:20200617T120000 DTEND;TZID=America/New_York:20200617T130000 DTSTAMP:20240911T223856Z URL:https://mestcenter.org/training/webinar-machine-learning-in-silicon-da ta-analytics/ SUMMARY:Webinar: Machine Learning in Silicon Data Analytics DESCRIPTION:To watch the recorded webinar\, click on the recording.\nPlay V ideo \nSpeaker:\nDr. Li-C. Wang\nAbstract:\nAn IEA is an autonomous syste m where the executable workflow component is enabled with machine learning models capturing human perception. IEA is designed to provide an end-to-e nd solution to analytics tasks so that the end results are both interpreta ble and actionable. This webinar discusses the key ideas for implementing such an end-to-end data analytics solution\, and demonstrates its usage in silicon data analytics based on data from actual semiconductor chip produ ct lines. \n \nZoom Information:\nJoin Zoom Meeting\nhttps://ufl.zoom.us/j /904047693\n\nMeeting ID: 904 047 693\n\nOne tap mobile\n+16465588656\,\,9 04047693# US (New York)\n+16699006833\,\,904047693# US (San Jose)\n\nDial by your location\n+1 646 558 8656 US (New York)\n+1 669 900 6833 US (San J ose)\nMeeting ID: 904 047 693\nFind your local number: https://ufl.zoom.us /u/ab5VOI6m6G\n\nJoin by SIP\n904047693@zoomcrc.com\n\nJoin by H.323\n162. 255.37.11 (US West)\n162.255.36.11 (US East)\n221.122.88.195 (China)\n115. 114.131.7 (India Mumbai)\n115.114.115.7 (India Hyderabad)\n213.19.144.110 (EMEA)\n103.122.166.55 (Australia)\n209.9.211.110 (Hong Kong)\n64.211.144. 160 (Brazil)\n69.174.57.160 (Canada)\n207.226.132.110 (Japan)\nMeeting ID: 904 047 693\n\nJoin by Skype for Business\nhttps://ufl.zoom.us/skype/9040 47693 ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2022/0 5/Li-C-Wang.jpeg CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VEVENT UID:147@mestcenter.org DTSTART;TZID=America/New_York:20200701T120000 DTEND;TZID=America/New_York:20200701T130000 DTSTAMP:20240911T224031Z URL:https://mestcenter.org/training/webinar-blockchain-for-electronic-supp ly-chain-part-ii/ SUMMARY:Webinar: Blockchain for Electronic Supply Chain\, Part II DESCRIPTION:To watch the recorded webinar\, click on the recording.\nPlay V ideo \nSpeaker:\nJason Vosatka\nAbstract:\nThe goal of this webinar is to learn and understand how to protect the electronics supply chain through trustworthy tracking and non-destructive verification of electronic compon ents.  Details of establishing a consortium-style blockchain infrastructu re are covered including general and restricted ledgers\, trusted and untr usted members\, and multi-level security controls.  The use of risk model ing to detect counterfeit integrated circuits (ICs) is also covered\, with the focus on objective and threshold metrics for authentication. \n \nZoo m Information:\nJoin Zoom Meeting\nhttps://ufl.zoom.us/j/904047693\n\nMeet ing ID: 904 047 693\n\nOne tap mobile\n+16465588656\,\,904047693# US (New York)\n+16699006833\,\,904047693# US (San Jose)\n\nDial by your location\n +1 646 558 8656 US (New York)\n+1 669 900 6833 US (San Jose)\nMeeting ID: 904 047 693\nFind your local number: https://ufl.zoom.us/u/ab5VOI6m6G\n\nJ oin by SIP\n904047693@zoomcrc.com\n\nJoin by H.323\n162.255.37.11 (US West )\n162.255.36.11 (US East)\n221.122.88.195 (China)\n115.114.131.7 (India M umbai)\n115.114.115.7 (India Hyderabad)\n213.19.144.110 (EMEA)\n103.122.16 6.55 (Australia)\n209.9.211.110 (Hong Kong)\n64.211.144.160 (Brazil)\n69.1 74.57.160 (Canada)\n207.226.132.110 (Japan)\nMeeting ID: 904 047 693\n\nJo in by Skype for Business\nhttps://ufl.zoom.us/skype/904047693 ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2022/0 8/JV.jpg CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VEVENT UID:148@mestcenter.org DTSTART;TZID=America/New_York:20200715T120000 DTEND;TZID=America/New_York:20200715T130000 DTSTAMP:20240911T224407Z URL:https://mestcenter.org/training/webinar-asynchronous-circuit-design-fo r-reliability-and-security/ SUMMARY:Webinar: Asynchronous Circuit Design for Reliability and Security DESCRIPTION:To watch the recorded webinar\, click on the recording.\nPlay V ideo \nSpeaker: \nDr. Jia Di\, Professor and Department Chair at Univers ity of Arkansas Computer Science and Computer Engineering Department\nAbst ract:\nInvented back in 1950’s\, asynchronous circuits have not been dev eloping nearly as fast as their clocked\, synchronous counterparts. While the synchronous design paradigm dominates the current digital IC market\, there are many applications for which asynchronous circuits have unmatched advantages. This is due to their unique benefits such as no clock\, flexi ble timing requirement\, average-case performance\, better energy efficien cy\, high modularity\, and low noise/EMI. This webinar will present some o f these applications in the areas of reliability and security.\nSpeaker Bi o:\nDr. Jia Di was born in Beijing\, China. He finished his B.S. and M.S. studies in Tsinghua University\, Beijing\, China\, in 1997 and 2000\, res pectively. He received his Ph.D. degree from Electrical and Computer Engin eering Department of the University of Central Florida\, Orlando. He join ed the Computer Science and Computer Engineering Department of the Univ ersity of Arkansas as an Assistant Professor in August 2004 and is curren tly a Professor\, Department Head\, and Rodger S. Kline Leadership Chair. \n \nZoom Information:\nJoin Zoom Meeting\nhttps://ufl.zoom.us/j/90404769 3\n\nMeeting ID: 904 047 693\n\nOne tap mobile\n+16465588656\,\,904047693# US (New York)\n+16699006833\,\,904047693# US (San Jose)\n\nDial by your l ocation\n+1 646 558 8656 US (New York)\n+1 669 900 6833 US (San Jose)\nMee ting ID: 904 047 693\nFind your local number: https://ufl.zoom.us/u/ab5VOI 6m6G\n\nJoin by SIP\n904047693@zoomcrc.com\n\nJoin by H.323\n162.255.37.11 (US West)\n162.255.36.11 (US East)\n221.122.88.195 (China)\n115.114.131.7 (India Mumbai)\n115.114.115.7 (India Hyderabad)\n213.19.144.110 (EMEA)\n1 03.122.166.55 (Australia)\n209.9.211.110 (Hong Kong)\n64.211.144.160 (Braz il)\n69.174.57.160 (Canada)\n207.226.132.110 (Japan)\nMeeting ID: 904 047 693\n\nJoin by Skype for Business\nhttps://ufl.zoom.us/skype/904047693 ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2022/0 8/JD.jpg CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VEVENT UID:149@mestcenter.org DTSTART;TZID=America/New_York:20200805T120000 DTEND;TZID=America/New_York:20200805T130000 DTSTAMP:20240911T224524Z URL:https://mestcenter.org/training/webinar-a-new-approach-to-measure-hard ware-security-coverage/ SUMMARY:Webinar: A New Approach to Measure Hardware Security Coverage DESCRIPTION:To watch the recorded webinar\, click on the recording.\nPlay V ideo \nSpeaker: \nDr. Jason Oberg\, CTO and co-founder of Tortuga Logic\ nAbstract:\nThis presentation will describe important industry initiatives supported by MITRE that can be effectively leveraged for measuring securi ty coverage against common hardware weaknesses. Additionally\, it will dis cuss innovative technical solutions that allow commercial and defense indu strial base companies to measure their security coverage against these com mon hardware weaknesses.\nSpeaker Bio:\nJason Oberg is the CTO and co-foun der of Tortuga Logic. His work has been cited more than 700 times and he h olds six issued and pending patents. He received his B.S. in Computer Engi neering from UC Santa Barbara and an M.S. and Ph.D. in Computer Science fr om UC San Diego. \n \nZoom Information:\nJoin Zoom Meeting\nhttps://ufl.zo om.us/j/904047693\n\nMeeting ID: 904 047 693\n\nOne tap mobile\n+164655886 56\,\,904047693# US (New York)\n+16699006833\,\,904047693# US (San Jose)\n \nDial by your location\n+1 646 558 8656 US (New York)\n+1 669 900 6833 US (San Jose)\nMeeting ID: 904 047 693\nFind your local number: https://ufl. zoom.us/u/ab5VOI6m6G\n\nJoin by SIP\n904047693@zoomcrc.com\n\nJoin by H.32 3\n162.255.37.11 (US West)\n162.255.36.11 (US East)\n221.122.88.195 (China )\n115.114.131.7 (India Mumbai)\n115.114.115.7 (India Hyderabad)\n213.19.1 44.110 (EMEA)\n103.122.166.55 (Australia)\n209.9.211.110 (Hong Kong)\n64.2 11.144.160 (Brazil)\n69.174.57.160 (Canada)\n207.226.132.110 (Japan)\nMeet ing ID: 904 047 693\n\nJoin by Skype for Business\nhttps://ufl.zoom.us/sky pe/904047693 ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2022/0 8/JO.jpg CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VEVENT UID:150@mestcenter.org DTSTART;TZID=America/New_York:20200819T120000 DTEND;TZID=America/New_York:20200819T130000 DTSTAMP:20240911T224630Z URL:https://mestcenter.org/training/webinar-side-channel-leakage-assessmen t-of-cryptographic-modules/ SUMMARY:Webinar: Side-Channel Leakage Assessment of Cryptographic Modules DESCRIPTION:To watch the recorded webinar\, click on the recording.\nPlay V ideo \nSpeaker: \nDr. Jungmin Park\, Assistant research scientist at the Florida Institute for Cybersecurity (FICS)\nAbstract:\nIn this talk\, Dr. Park will introduce how to analyze and quantify side-channel leakage info rmation at various design stages such as RTL\, gate level and post-silicon level. Based on these analysis\, most vulnerable modules will be searched and replaced with secure modules.\nSpeaker Bio:\nJungmin Park is an assis tant research scientist at the Florida Institute for Cybersecurity (FICS). He received his B.S. degree and M.S. in electrical engineering from Kyung hee University\, Korea\, in 2007\, and the M.S. in computer engineering fr om Kyunghee University\, Korea\, in 2009 and Ph.D. in computer engineering from Iowa State University\, Ames\, IA\, in 2016. He joined the FICS rese arch as a postdoctoral fellow in 2016. \n \nZoom Information:\nJoin Zoom M eeting\nhttps://ufl.zoom.us/j/904047693\n\nMeeting ID: 904 047 693\n\nOne tap mobile\n+16465588656\,\,904047693# US (New York)\n+16699006833\,\,9040 47693# US (San Jose)\n\nDial by your location\n+1 646 558 8656 US (New Yor k)\n+1 669 900 6833 US (San Jose)\nMeeting ID: 904 047 693\nFind your loca l number: https://ufl.zoom.us/u/ab5VOI6m6G\n\nJoin by SIP\n904047693@zoomc rc.com\n\nJoin by H.323\n162.255.37.11 (US West)\n162.255.36.11 (US East)\ n221.122.88.195 (China)\n115.114.131.7 (India Mumbai)\n115.114.115.7 (Indi a Hyderabad)\n213.19.144.110 (EMEA)\n103.122.166.55 (Australia)\n209.9.211 .110 (Hong Kong)\n64.211.144.160 (Brazil)\n69.174.57.160 (Canada)\n207.226 .132.110 (Japan)\nMeeting ID: 904 047 693\n\nJoin by Skype for Business\nh ttps://ufl.zoom.us/skype/904047693 ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2022/0 8/JP.png CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VEVENT UID:151@mestcenter.org DTSTART;TZID=America/New_York:20200902T120000 DTEND;TZID=America/New_York:20200902T130000 DTSTAMP:20251106T182734Z URL:https://mestcenter.org/training/webinar-side-channel/ SUMMARY:Practical Side Channel Analysis DESCRIPTION:To watch the recorded webinar\, click on the recording.\nPlay V ideo \nWe present an introduction to side channel analysis\, an interacti ve tutorial. The lecture starts with a light introduction to cryptographic implementations and leakage models. We then discuss the basic experimenta l setup for power analysis and contrast power and EM data collection. The majority of the seminar is an attack on the CHES 2016 side channel competi tion traces. \n \nZoom Information:\nJoin Zoom Meeting\nhttps://ufl.zoom.u s/j/904047693\n\nMeeting ID: 904 047 693\n\nOne tap mobile\n+16465588656\, \,904047693# US (New York)\n+16699006833\,\,904047693# US (San Jose)\n\nDi al by your location\n+1 646 558 8656 US (New York)\n+1 669 900 6833 US (Sa n Jose)\nMeeting ID: 904 047 693\nFind your local number: https://ufl.zoom .us/u/ab5VOI6m6G\n\nJoin by SIP\n904047693@zoomcrc.com\n\nJoin by H.323\n1 62.255.37.11 (US West)\n162.255.36.11 (US East)\n221.122.88.195 (China)\n1 15.114.131.7 (India Mumbai)\n115.114.115.7 (India Hyderabad)\n213.19.144.1 10 (EMEA)\n103.122.166.55 (Australia)\n209.9.211.110 (Hong Kong)\n64.211.1 44.160 (Brazil)\n69.174.57.160 (Canada)\n207.226.132.110 (Japan)\nMeeting ID: 904 047 693\n\nJoin by Skype for Business\nhttps://ufl.zoom.us/skype/9 04047693 ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2022/0 8/KLB.jpg CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VEVENT UID:152@mestcenter.org DTSTART;TZID=America/New_York:20200916T120000 DTEND;TZID=America/New_York:20200916T130000 DTSTAMP:20240911T231216Z URL:https://mestcenter.org/training/webinar-counterfeit-detection-electric al-logical-test-techniques/ SUMMARY:Webinar: Counterfeit Detection: Electrical/Logical Test Techniques DESCRIPTION:To watch the recorded webinar\, click on the recording.\nPlay V ideo \nSpeaker: \nDr. Domenic Forte\, Associate Professor and the Steven A. Yatauro Faculty Fellow in the Electrical and Computer Engineering (ECE ) Department at the University of Florida\nAbstract:\nIn this webinar\, we will cover (i) Counterfeit electronic part sources and motivation\; (ii) Counterfeit IC type\, defect\, and detection taxonomies\; (iii) Basic para metric/functional tests\; (iv) More advanced detection approaches that tar get counterfeit processors\, memories\, and FPGAs\; (v) International stan dards and commercially available tools\; and (vi) Open problems and future directions.\nSpeaker Bio:\nI am currently an Associate Professor and the Steven A. Yatauro Faculty Fellow in the Electrical and Computer Engineerin g (ECE) Department at the University of Florida. Previously\, I was an Ass istant Professor in the Electrical and Computer Engineering (ECE) Departme nt at the University of Connecticut. I received my PhD in Electrical and C omputer Engineering from the University of Maryland in 2013. My current re search focuses on:\n\n Counterfeit Electronics Detection and Avoidance\n Hardware Security Primitives\n Hardware Trojan Detection and Prevention\ n Nanoscale Integration Challenges\n Reverse Engineering and Anti-revers e Engineering\n Computer-Aided Design (CAD) Tools\, Metrics\, and Rules f or Hardware Security\n Biometric Authentication\n\nPast projects of mine include Dynamic Energy and Thermal management in Distributed Systems and G reen Computing in Large-Scale Datacenters.\n\n \; \n \nZoom Informatio n:\nJoin Zoom Meeting\nhttps://ufl.zoom.us/j/904047693\n\nMeeting ID: 904 047 693\n\nOne tap mobile\n+16465588656\,\,904047693# US (New York)\n+1669 9006833\,\,904047693# US (San Jose)\n\nDial by your location\n+1 646 558 8 656 US (New York)\n+1 669 900 6833 US (San Jose)\nMeeting ID: 904 047 693\ nFind your local number: https://ufl.zoom.us/u/ab5VOI6m6G\n\nJoin by SIP\n 904047693@zoomcrc.com\n\nJoin by H.323\n162.255.37.11 (US West)\n162.255.3 6.11 (US East)\n221.122.88.195 (China)\n115.114.131.7 (India Mumbai)\n115. 114.115.7 (India Hyderabad)\n213.19.144.110 (EMEA)\n103.122.166.55 (Austra lia)\n209.9.211.110 (Hong Kong)\n64.211.144.160 (Brazil)\n69.174.57.160 (C anada)\n207.226.132.110 (Japan)\nMeeting ID: 904 047 693\n\nJoin by Skype for Business\nhttps://ufl.zoom.us/skype/904047693 ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2022/0 8/DF.jpg CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VEVENT UID:153@mestcenter.org DTSTART;TZID=America/New_York:20201007T120000 DTEND;TZID=America/New_York:20201007T130000 DTSTAMP:20240911T231329Z URL:https://mestcenter.org/training/webinar-closing-information-leakage-ch annels-in-microarchitecture/ SUMMARY:Webinar: Closing Information Leakage Channels in Microarchitecture DESCRIPTION:To watch the recorded webinar\, click on the recording.\nPlay V ideo \nSpeaker:\nDr. Guru Venkataramani\, Professor at George Washington University\nAbstract:\nIn this talk\, we will first visit the fundamental problems surrounding sensitive information leakage that dominate security research landscape and has the potential to hamper upcoming applications. More recently\, timing channels have emerged as one of the most dangerous forms of information leakage leaving no physical evidence of an attack.\nS peaker Bio:\nProfessor Guru Venkataramani's group conducts research in com puter architecture with an emphasis on security and energy efficiency. His research has been funded by NSF\, SRC\, ONR and ORAU. Prof. Venkataramani ’s research group has pioneering contributions in investigating hardware timing channels on multicore processors. He is a recipient of NSF CAREER award\, ORAU Ralph E. Powe Junior Faculty Enhancement award and best paper awards in research conferences. He was one of the two general chairs for IEEE HPCA 2019 and organized NSF workshop on side and covert channels in c omputing systems at GWU in 2018. \n \nZoom Information:\nJoin Zoom Meeting \nhttps://ufl.zoom.us/j/904047693\n\nMeeting ID: 904 047 693\n\nOne tap mo bile\n+16465588656\,\,904047693# US (New York)\n+16699006833\,\,904047693# US (San Jose)\n\nDial by your location\n+1 646 558 8656 US (New York)\n+1 669 900 6833 US (San Jose)\nMeeting ID: 904 047 693\nFind your local numb er: https://ufl.zoom.us/u/ab5VOI6m6G\n\nJoin by SIP\n904047693@zoomcrc.com \n\nJoin by H.323\n162.255.37.11 (US West)\n162.255.36.11 (US East)\n221.1 22.88.195 (China)\n115.114.131.7 (India Mumbai)\n115.114.115.7 (India Hyde rabad)\n213.19.144.110 (EMEA)\n103.122.166.55 (Australia)\n209.9.211.110 ( Hong Kong)\n64.211.144.160 (Brazil)\n69.174.57.160 (Canada)\n207.226.132.1 10 (Japan)\nMeeting ID: 904 047 693\n\nJoin by Skype for Business\nhttps:/ /ufl.zoom.us/skype/904047693 ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2022/0 8/GPV.jpg CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VEVENT UID:154@mestcenter.org DTSTART;TZID=America/New_York:20201021T120000 DTEND;TZID=America/New_York:20201021T130000 DTSTAMP:20240911T231430Z URL:https://mestcenter.org/training/webinar-logic-locking-for-chip-design- protection-lessons-learnt-metrics-and-trade-offs/ SUMMARY:Webinar: Logic Locking for Chip Design Protection: Lessons Learnt\, Metrics\, and Trade-offs DESCRIPTION:To watch the recorded webinar\, click on the recording.\nPlay V ideo \nSpeaker: \nDr. Ozgur Sinanoglu\, New York University\nAbstract:  \nThis webinar elaborates on the threats such as reverse engineering\, pir acy and IC overbuilding that the chip design industry is up against\, whil e describing a design-for-trust solution that has been developed over the last decade\, called logic locking\, to protect chip designs from these th reats. This webinar also covers the threat models and lessons learnt in lo gic locking\, the relevant security metrics\, and implementation trade-off s.\nSpeaker Bio: \nOzgur Sinanoglu is a professor of electrical and compu ter engineering at New York University Abu Dhabi. He earned his B.S. degre es\, one in Electrical and Electronics Engineering and one in Computer Eng ineering\, both from Bogazici University\, Turkey in 1999. He obtained his MS and PhD in Computer Science and Engineering from University of Califor nia San Diego in 2001 and 2004\, respectively. He has industry experience at Texas Instruments\, IBM and Qualcomm\, and has been with NYU Abu Dhabi since 2010. During his PhD\, he won the IBM PhD fellowship award twice. H e is also the recipient of the best paper awards at IEEE VLSI Test Symposi um 2011 and ACM Conference on Computer and Communication Security 2013. He also received the inaugural Distinguished Faculty Research Award at NYUAD in 2021. Sinanoglu has recently been elected in 2021 to serve on the Moha mmed bin Rashid Academy of Scientists\, UAE.\n\n \;\n\nProf. Sinanoglu ’s research interests include design-for-test\, design-for-security and design-for-trust for VLSI circuits\, where he has more than 200 conference and journal papers\, and 20 issued and pending US Patents. Sinanoglu has given more than a dozen tutorials on hardware security and trust in leadi ng chip design automation conferences. He has served as track/topic chair or technical program committee member in about 15 conferences\, and as (g uest) associate editor for IEEE TIFS\, IEEE TCAD\, ACM JETC\, IEEE TETC\, Elsevier MEJ\, JETTA\, and IET CDT journals.\n\n \;\n\nProf. Sinanoglu is the director of the is the director of the Center for Cybersecurity  as well as the Design-for-Excellence Lab at NYU Abu Dhabi. His recent rese arch in hardware security and trust is being funded by US National Science Foundation\, US Department of Defense\, Semiconductor Research Corporatio n\, Intel Corp and Mubadala Technology. \n \nZoom Information:\nJoin Zoom Meeting\nhttps://ufl.zoom.us/j/904047693\n\nMeeting ID: 904 047 693\n\nOne tap mobile\n+16465588656\,\,904047693# US (New York)\n+16699006833\,\,904 047693# US (San Jose)\n\nDial by your location\n+1 646 558 8656 US (New Yo rk)\n+1 669 900 6833 US (San Jose)\nMeeting ID: 904 047 693\nFind your loc al number: https://ufl.zoom.us/u/ab5VOI6m6G\n\nJoin by SIP\n904047693@zoom crc.com\n\nJoin by H.323\n162.255.37.11 (US West)\n162.255.36.11 (US East) \n221.122.88.195 (China)\n115.114.131.7 (India Mumbai)\n115.114.115.7 (Ind ia Hyderabad)\n213.19.144.110 (EMEA)\n103.122.166.55 (Australia)\n209.9.21 1.110 (Hong Kong)\n64.211.144.160 (Brazil)\n69.174.57.160 (Canada)\n207.22 6.132.110 (Japan)\nMeeting ID: 904 047 693\n\nJoin by Skype for Business\n https://ufl.zoom.us/skype/904047693 ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2022/0 8/OS.jpg CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VEVENT UID:164@mestcenter.org DTSTART;TZID=America/New_York:20201104T120000 DTEND;TZID=America/New_York:20201104T130000 DTSTAMP:20240901T193659Z URL:https://mestcenter.org/training/webinar-hardware-security-primitives-r ecent-advancements/ SUMMARY:Webinar: Hardware Security Primitives: Recent Advancements DESCRIPTION:To watch the recorded webinar\, click on the recording.\nPlay V ideo \nSpeaker: \nDr. Fahim Rahman\, Research Assistant Professor with t he Electrical and Computer Engineering Department\, University of Florida\ nAbstract:\nSpeaker Bio:\nFahim Rahman is currently a Research Assistant P rofessor with the Electrical and Computer Engineering Department\, Univers ity of Florida\, Gainesville\, FL\, USA. He received his Ph.D. in electric al and computer engineering from the University of Florida\, Gainesville\, USA in 2018. He received his BS in electrical and electronic engineering from Bangladesh University of Engineering and Technology\, Bangladesh and MS in electrical and computer engineering from the University of Connectic ut\, USA in 2015\, respectively. His current research is in the domain of hardware and cybersecurity and trust including investigation of hardware s ecurity primitives\, CAD for security and automatic assessment\, FPGA secu rity\, electronic supply-chain security\, and hardware-assisted cybersecur ity. He published 3 book chapters and 15+ peer-reviewed papers. His resear ch has been sponsored by SRC\, AFOSR\, AFRL\, DARPA\, Cisco\, TI\, and NIS T. He is a member of IEEE and ACM. \n \nZoom Information:\nJoin Zoom Meeti ng\nhttps://ufl.zoom.us/j/904047693\n\nMeeting ID: 904 047 693\n\nOne tap mobile\n+16465588656\,\,904047693# US (New York)\n+16699006833\,\,90404769 3# US (San Jose)\n\nDial by your location\n+1 646 558 8656 US (New York)\n +1 669 900 6833 US (San Jose)\nMeeting ID: 904 047 693\nFind your local nu mber: https://ufl.zoom.us/u/ab5VOI6m6G\n\nJoin by SIP\n904047693@zoomcrc.c om\n\nJoin by H.323\n162.255.37.11 (US West)\n162.255.36.11 (US East)\n221 .122.88.195 (China)\n115.114.131.7 (India Mumbai)\n115.114.115.7 (India Hy derabad)\n213.19.144.110 (EMEA)\n103.122.166.55 (Australia)\n209.9.211.110 (Hong Kong)\n64.211.144.160 (Brazil)\n69.174.57.160 (Canada)\n207.226.132 .110 (Japan)\nMeeting ID: 904 047 693\n\nJoin by Skype for Business\nhttps ://ufl.zoom.us/skype/904047693 ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2022/0 5/Fahim-Rahman.jpeg CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VEVENT UID:155@mestcenter.org DTSTART;TZID=America/New_York:20201118T120000 DTEND;TZID=America/New_York:20201118T130000 DTSTAMP:20240901T193857Z URL:https://mestcenter.org/training/webinar-towards-secure-high-performanc e-computer-architectures/ SUMMARY:Webinar: Towards Secure High-Performance Computer Architectures DESCRIPTION:To watch the recorded webinar\, click on the recording.\nPlay V ideo \nSpeaker:\nDr. Srini Devadas\, Webster Professor of Electrical Engi neering and Computer Science at MIT\nAbstract:\nDigital design flow is a l engthy process that involves many steps to take the design from RTL to the system testing phase. The objective of this webinar is to demystify this field and provide in-depth understanding of the different transformations that occur in each design step\, and how these transformations can affect the final performance metrics. The webinar will focus on FPGAs as the targ et technology. FPGA is a very powerful technology to implement complex Sys tem on Chip (SoCs) in an efficient way and in extremely fast time to marke t. With the recent advancements in their architecture\, speed\, power effi ciency\, and peripherals\, FPGAs breached almost every field from IoT to s pace and military applications.Specifically\, this webinar will focus on f undamental elements in the design process\, including HDL modeling\, event ‑driven simulation\, synthesis\, timing analysis\, and FPGA architecture .\nSpeaker Bio:\nSrini Devadas is the Webster Professor of Electrical Engi neering and Computer Science and has has been on the MIT EECS faculty sinc e 1988. He served as Associate Head of the Department of Electrical Engine ering and Computer Science\, with responsibility for Computer Science\, fr om 2005 to 2011.\n\nDevadas's research interests span Computer-Aided Desig n (CAD)\, computer security and computer architecture and he has received significant awards from each discipline. In 2015\, he received the ACM/IEE E A. Richard Newton Technical Impact award in Electronic Design Automation . He received the IEEE Computer Society Technical Achievement Award in 201 4 for inventing Physical Unclonable Functions and single-chip secure proce ssor architectures. Devadas's work on hardware information flow tracking p ublished in the 2004 ASPLOS received the ASPLOS Most Influential Paper Awa rd in 2014. His papers on analytical cache modeling and the Aegis single-c hip secure processor were included as influential papers in "25 Years of t he International Conference on Supercomputing." In 2017 he received the IE EE W. Wallace McDowell Award for contributions to secure hardware. He is a n IEEE and ACM Fellow.\n\nDevadas has taught widely in EECS\, lecturing cl asses in VLSI\, discrete mathematics\, computer architecture\, algorithms and software engineering. He is a MacVicar Faculty Fellow and an Everett M oore Baker teaching award recipient\, considered MIT's two highest undergr aduate teaching honors. \n \nZoom Information:\nJoin Zoom Meeting\nhttps:/ /ufl.zoom.us/j/904047693\n\nMeeting ID: 904 047 693\n\nOne tap mobile\n+16 465588656\,\,904047693# US (New York)\n+16699006833\,\,904047693# US (San Jose)\n\nDial by your location\n+1 646 558 8656 US (New York)\n+1 669 900 6833 US (San Jose)\nMeeting ID: 904 047 693\nFind your local number: https ://ufl.zoom.us/u/ab5VOI6m6G\n\nJoin by SIP\n904047693@zoomcrc.com\n\nJoin by H.323\n162.255.37.11 (US West)\n162.255.36.11 (US East)\n221.122.88.195 (China)\n115.114.131.7 (India Mumbai)\n115.114.115.7 (India Hyderabad)\n2 13.19.144.110 (EMEA)\n103.122.166.55 (Australia)\n209.9.211.110 (Hong Kong )\n64.211.144.160 (Brazil)\n69.174.57.160 (Canada)\n207.226.132.110 (Japan )\nMeeting ID: 904 047 693\n\nJoin by Skype for Business\nhttps://ufl.zoom .us/skype/904047693 ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2022/0 8/SD.png CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VEVENT UID:156@mestcenter.org DTSTART;TZID=America/New_York:20201202T120000 DTEND;TZID=America/New_York:20201202T130000 DTSTAMP:20240911T231635Z URL:https://mestcenter.org/training/webinar-machine-learning-on-encrypted- data-hardware-to-the-rescue/ SUMMARY:Webinar: Machine Learning on Encrypted Data: Hardware to the Rescue DESCRIPTION:To watch the recorded webinar\, click on the recording.\nPlay V ideo \nSpeaker:\nDr. Farinaz Koushanfar\, University of California San Di ego\nAbstract:\nThis talk highlights the crucial role of hardware and adva nces in computing architecture in supporting the recent progresses in the field. I outline the main technologies and mixed computing models. I parti cularly center my talk on the recent progress in synthesis of Garbled Circ uits that provide a leap in scalable realization of machine learning on en crypted data.\nSpeaker Bio:\nFarinaz Koushanfar is a professor and Henry B ooker Faculty Scholar in the Electrical and Computer Engineering (ECE) dep artment at University of California San Diego (UCSD)\, where she directs t he Adaptive Computing and Embedded Systems (ACES) Lab. She is the co-found er and co-director of the UCSD Center for Machine-Integrated Computing &am p\; Security (MICS) which launched in 2018. Before joining UCSD\, she was a professor in the ECE department at William Marsh Rice University which s he joined as an assistant professor 9 years earlier. Prof. Koushanfar rece ived her Ph.D. in Electrical Engineering and Computer Science as well as h er M.A. in Statistics from UC Berkeley in December 2005. Her research addr esses several aspects of efficient computing and embedded systems\, with a focus on hardware and system security\, real-time/energy-efficient big da ta analytics under resource constraints\, design automation and synthesis for emerging applications\, as well as practical privacy-preserving comput ing.\nProfessor Koushanfar serves as an associate partner of the Intel Col laborative Research Institute for Secure Computing to aid developing solut ions for the next generation of embedded secure devices. Dr. Koushanfar is a fellow of the Kavli Foundation Frontiers of the National Academy of Eng ineering. She has received a number of awards and honors for her research\ , mentorship\, teaching\, and outreach activities including the Presidenti al Early Career Award for Scientists and Engineers (PECASE) from President Obama\, the ACM SIGDA Outstanding New Faculty Award\, Cisco IoT Security Grand Challenge Award\, MIT Technology Review TR-35 2008 (World’s top 35 innovators under 35)\, as well as Young Faculty/CAREER Awards from NSF\, DARPA\, ONR and ARO. \n \nZoom Information:\nJoin Zoom Meeting\nhttps://uf l.zoom.us/j/904047693\n\nMeeting ID: 904 047 693\n\nOne tap mobile\n+16465 588656\,\,904047693# US (New York)\n+16699006833\,\,904047693# US (San Jos e)\n\nDial by your location\n+1 646 558 8656 US (New York)\n+1 669 900 683 3 US (San Jose)\nMeeting ID: 904 047 693\nFind your local number: https:// ufl.zoom.us/u/ab5VOI6m6G\n\nJoin by SIP\n904047693@zoomcrc.com\n\nJoin by H.323\n162.255.37.11 (US West)\n162.255.36.11 (US East)\n221.122.88.195 (C hina)\n115.114.131.7 (India Mumbai)\n115.114.115.7 (India Hyderabad)\n213. 19.144.110 (EMEA)\n103.122.166.55 (Australia)\n209.9.211.110 (Hong Kong)\n 64.211.144.160 (Brazil)\n69.174.57.160 (Canada)\n207.226.132.110 (Japan)\n Meeting ID: 904 047 693\n\nJoin by Skype for Business\nhttps://ufl.zoom.us /skype/904047693 ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2022/0 8/FK.jpg CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VEVENT UID:157@mestcenter.org DTSTART;TZID=America/New_York:20210120T120000 DTEND;TZID=America/New_York:20210120T130000 DTSTAMP:20240911T231738Z URL:https://mestcenter.org/training/webinar-integrated-circuit-design-reda ction-through-transistor-level-programming/ SUMMARY:Webinar: Integrated Circuit Design Redaction through Transistor-Lev el Programming DESCRIPTION:To watch the recorded webinar\, click on the recording.\nPlay V ideo\nSpeaker:\nDr. Yiorgos Makris\, Professor of ECE at the University of Texas at Dallas\nAbstract:\nIn this webinar we will discuss the design of the latest version of our TRAP fabric\, the CAD tool-flow necessary for s upporting such hybrid designs ASIC/Programmable ICs\, and the protection t hat TRAP-based design redaction offers against both brute-force and intell igent attacks seeking to recover the redacted IP.\nSpeaker Bio:\nYiorgos i s a professor of Electrical and Computer Engineering in the Erik Jonsson S chool of Engineering &\; Computer Science at The University of Texas at Dallas\, where he leads the Trusted and RELiable Architectures (TRELA) Re search Laboratory\, the Safety\, Security and Health Care Thrust of the Te xas Analog Center of Excellence (TxACE)\, and the UT Dallas site of the NS F Industry University Cooperative Research Center (IUCRC) on Hardware and Embedded System Security and Trust (CHEST). Prior to joining UT Dallas in 2011\, he spent 10.5 years as a faculty of Electrical Engineering and of C omputer Science at Yale University. He holds a Ph.D. (2001) and an M.S. (1 997) in Computer Engineering from the University of California\, San Diego \, and a Diploma of Computer Engineering and Informatics (1995) from the U niversity of Patras\, Greece. His main research interests are in the appli cation of machine learning and statistical analysis in the design of trust ed and reliable integrated circuits and systems\, with particular emphasis in the analog/RF domain. He is also investigating hardware-based malware detection\, forensics and reliability methods in modern microprocessors\, as well as on-die learning and novel computational modalities using emergi ng technologies. His research activities have been supported by NSF\, ARO\ , AFRL\, KCNSC\, SRC\, DARPA\, Boeing\, IBM\, LSI\, Intel\, Advantest\, AM S\, Qualcomm\, and TI.\n\nYiorgos served as the 2016-2017 general chair an d the 2013-2014 program chair of the IEEE VLSI Test Symposium\, as well as the 2010-2012 program chair of the Test Technology Educational Program (T TEP). He serves or has served as an associate editor of the IEEE Transacti ons on Information Forensics and Security\, the IEEE Transactions on Compu ter-Aided Design of Integrated Circuits and Systems\, the IEEE Design & \; Test periodical and the Springer Journal of Electronic Testing: Theory and Applications\, and he has also served as a guest editor for the IEEE T ransactions on Computers and the IEEE Transactions on Computer-Aided Desig n of Integrated Circuits and Systems\, and as a topic coordinator and/or p rogram committee member for several IEEE and ACM conferences. He is a Seni or Member of the IEEE\, a recipient of the 2006 Sheffield Distinguished Te aching Award from Yale University\, a recipient of Best Paper Awards from the 2013 Design Automation and Test in Europe (DATE’13) conference and t he 2015 VLSI Test Symposium (VTS’15)\, as well as a recipient of Best Ha rdware Demonstration Awards from the 2016 and 2018 Symposia on Hardware Or iented Security and Trust (HOST’16 and HOST’18). \n \nZoom Information :\nJoin Zoom Meeting\nhttps://ufl.zoom.us/j/904047693\n\nMeeting ID: 904 0 47 693\n\nOne tap mobile\n+16465588656\,\,904047693# US (New York)\n+16699 006833\,\,904047693# US (San Jose)\n\nDial by your location\n+1 646 558 86 56 US (New York)\n+1 669 900 6833 US (San Jose)\nMeeting ID: 904 047 693\n Find your local number: https://ufl.zoom.us/u/ab5VOI6m6G\n\nJoin by SIP\n9 04047693@zoomcrc.com\n\nJoin by H.323\n162.255.37.11 (US West)\n162.255.36 .11 (US East)\n221.122.88.195 (China)\n115.114.131.7 (India Mumbai)\n115.1 14.115.7 (India Hyderabad)\n213.19.144.110 (EMEA)\n103.122.166.55 (Austral ia)\n209.9.211.110 (Hong Kong)\n64.211.144.160 (Brazil)\n69.174.57.160 (Ca nada)\n207.226.132.110 (Japan)\nMeeting ID: 904 047 693\n\nJoin by Skype f or Business\nhttps://ufl.zoom.us/skype/904047693 ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2022/0 8/YM.jpg CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VEVENT UID:158@mestcenter.org DTSTART;TZID=America/New_York:20210203T120000 DTEND;TZID=America/New_York:20210203T130000 DTSTAMP:20240911T231858Z URL:https://mestcenter.org/training/webinar-contactless-optical-probing-on -integrated-circuits/ SUMMARY:Webinar: Contactless Optical Probing on Integrated Circuits DESCRIPTION:To watch the recorded webinar\, click on the recording.\nPlay V ideo\nSpeaker: \nDr. Navid Asadi\, Assistant Professor at University of F lorida\nAbstract:\nIn this presentation we will assess the security vulner abilities in modern integrated circuits (ICs) against contactless optical probing. The basics and the principle of optical probing physics and its v arious modalities will be presented first. A case study will be presented then using the PHEMOS-1000 machine in our lab which is equipped with elect ro optical probing and electro optical frequency mapping modules.\nSpeaker Bio:\nNavid Asadi is an assistant professor in the department of electric al and computer engineering at university of Florida. His research is main ly focused on physical inspection of electronics from device to system lev el. He investigates novel techniques for integrated circuits counterfeit detection/prevention\, system and chip level reverse engineering\, anti-re verse engineering\, invasive and semi-invasive physical attacks\, integrit y analysis\, etc. using advanced inspection methods including but not limi ted to 3D X-ray microscopy\, Optical imaging\, scanning electron microscop y (SEM)\, focused ion beams (FIBs)\, THz imaging\, etc. in combination wit h image processing and machine learning algorithms to make the inspection process intelligent and independent from human. He has recived several bes t paper awards and is the co-founder of IEEE-PAINE conference. \n \nZoom I nformation:\nJoin Zoom Meeting\nhttps://ufl.zoom.us/j/904047693\n\nMeeting ID: 904 047 693\n\nOne tap mobile\n+16465588656\,\,904047693# US (New Yor k)\n+16699006833\,\,904047693# US (San Jose)\n\nDial by your location\n+1 646 558 8656 US (New York)\n+1 669 900 6833 US (San Jose)\nMeeting ID: 904 047 693\nFind your local number: https://ufl.zoom.us/u/ab5VOI6m6G\n\nJoin by SIP\n904047693@zoomcrc.com\n\nJoin by H.323\n162.255.37.11 (US West)\n 162.255.36.11 (US East)\n221.122.88.195 (China)\n115.114.131.7 (India Mumb ai)\n115.114.115.7 (India Hyderabad)\n213.19.144.110 (EMEA)\n103.122.166.5 5 (Australia)\n209.9.211.110 (Hong Kong)\n64.211.144.160 (Brazil)\n69.174. 57.160 (Canada)\n207.226.132.110 (Japan)\nMeeting ID: 904 047 693\n\nJoin by Skype for Business\nhttps://ufl.zoom.us/skype/904047693 ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2022/0 8/NA.jpg CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VEVENT UID:159@mestcenter.org DTSTART;TZID=America/New_York:20210217T120000 DTEND;TZID=America/New_York:20210217T130000 DTSTAMP:20240911T233108Z URL:https://mestcenter.org/training/webinar-swatting-the-hardware-security -bugs/ SUMMARY:Webinar: Swatting the Hardware Security Bugs DESCRIPTION:To watch the recorded webinar\, click on the recording.\nPlay V ideo\nSpeaker:\nDr. Jeyavijayan (JV) Rajendran\, Asisstant Professor at Te xas A&\;M University\nAbstract:\nIn this work\, we take a deep dive int o microarchitectural security from a hardware designer’s perspective by reviewing state-of-the-art approaches used to detect hardware vulnerabilit ies at design time. We show that a protection gap currently exists\, leavi ng chip designs vulnerable to software-based attacks that can exploit thes e hardware vulnerabilities.\n\nSpeaker Bio:\nJeyavijayan (JV) Rajendran (S ’09\, M’15) is an Assistant Professor in the Department of Electrical and Computer Engineering at Texas A&\;M University. Previously\, he was an Assistant Professor at UT Dallas between 2015 and 2017. He obtained hi s Ph.D. degree in the Electrical and Computer Engineering Department at Ne w York University in August 2015.\n\nProf. Rajendran’s research interest s include hardware security and computer security. His research has won th e the ACM SIGDA Outstanding Young Faculty Award in 2019\, NSF CAREER Award in 2017\, the ACM SIGDA Outstanding Ph.D. Dissertation Award in 2017\, an d the Alexander Hessel Award for the Best Ph.D. Dissertation in the Electr ical and Computer Engineering Department at NYU in 2016. He has won three Student Paper Awards (ACM CCS 2013\, IEEE DFTS 2013\, and IEEE VLSI Design 2012)\; four ACM Student Research Competition Awards (DAC 2012\, ICCAD 20 13\, DAC 2014\, and the Grand Finals 2013)\; Service Recognition Award fro m Intel\; Third place at Kaspersky American Cup\, 2011\; and Myron M. Rose nthal Award for Best Academic Performance in M.S. from NYU\, 2011. He orga nizes the annual Embedded Security Challenge\, a red-team/blue-team hardwa re security competition\, and has cofounded Hack@DAC\, a student security competition co-located with DAC\, and FOSTER. He is a member of IEEE and A CM. \n \nZoom Information:\nJoin Zoom Meeting\nhttps://ufl.zoom.us/j/90404 7693\n\nMeeting ID: 904 047 693\n\nOne tap mobile\n+16465588656\,\,9040476 93# US (New York)\n+16699006833\,\,904047693# US (San Jose)\n\nDial by you r location\n+1 646 558 8656 US (New York)\n+1 669 900 6833 US (San Jose)\n Meeting ID: 904 047 693\nFind your local number: https://ufl.zoom.us/u/ab5 VOI6m6G\n\nJoin by SIP\n904047693@zoomcrc.com\n\nJoin by H.323\n162.255.37 .11 (US West)\n162.255.36.11 (US East)\n221.122.88.195 (China)\n115.114.13 1.7 (India Mumbai)\n115.114.115.7 (India Hyderabad)\n213.19.144.110 (EMEA) \n103.122.166.55 (Australia)\n209.9.211.110 (Hong Kong)\n64.211.144.160 (B razil)\n69.174.57.160 (Canada)\n207.226.132.110 (Japan)\nMeeting ID: 904 0 47 693\n\nJoin by Skype for Business\nhttps://ufl.zoom.us/skype/904047693 ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2022/0 8/JR.png CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VEVENT UID:173@mestcenter.org DTSTART;TZID=America/New_York:20210217T120000 DTEND;TZID=America/New_York:20210217T130000 DTSTAMP:20240911T232015Z URL:https://mestcenter.org/training/webinar-sparta-cots-a-laser-probing-ap proach-for-sequential-trojan-detection-in-cots-integrated-circuits/ SUMMARY:Webinar: SPARTA-COTS A Laser Probing Approach for Sequential Trojan Detection in COTS Integrated Circuits DESCRIPTION:To watch the recorded webinar\, click on the recording.\nPlay V ideo\nSpeaker:\nDr. Andrew Stern \n \nZoom Information:\nJoin Zoom Meeting \nhttps://ufl.zoom.us/j/904047693\n\nMeeting ID: 904 047 693\n\nOne tap mo bile\n+16465588656\,\,904047693# US (New York)\n+16699006833\,\,904047693# US (San Jose)\n\nDial by your location\n+1 646 558 8656 US (New York)\n+1 669 900 6833 US (San Jose)\nMeeting ID: 904 047 693\nFind your local numb er: https://ufl.zoom.us/u/ab5VOI6m6G\n\nJoin by SIP\n904047693@zoomcrc.com \n\nJoin by H.323\n162.255.37.11 (US West)\n162.255.36.11 (US East)\n221.1 22.88.195 (China)\n115.114.131.7 (India Mumbai)\n115.114.115.7 (India Hyde rabad)\n213.19.144.110 (EMEA)\n103.122.166.55 (Australia)\n209.9.211.110 ( Hong Kong)\n64.211.144.160 (Brazil)\n69.174.57.160 (Canada)\n207.226.132.1 10 (Japan)\nMeeting ID: 904 047 693\n\nJoin by Skype for Business\nhttps:/ /ufl.zoom.us/skype/904047693 ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2022/0 9/Stern.jpg CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VEVENT UID:163@mestcenter.org DTSTART;TZID=America/New_York:20210303T120000 DTEND;TZID=America/New_York:20210303T130000 DTSTAMP:20250415T200125Z URL:https://mestcenter.org/training/webinar-practical-security-soc-design- considerations-making-the-transition-from-the-lab-to-the-fab/ SUMMARY:Webinar: Practical Security SoC Design Considerations: Making the T ransition from the Lab to the Fab DESCRIPTION:To watch the recorded webinar\, click on the recording.\nPlay V ideo\nSpeaker: \nMike Borza\, Synopsys Scientist\nAbstract:\nDesigning se cure hardware that stays secure is hard. Designing it to fit well into mod ern high volume semiconductor manufacturing flows is harder. Integrated mi croelectronics is at the pinnacle of manufacturing technology. That techno logy has been perfected to produce billions of identical copies of the sam e product\, with high reliability and low cost. This is done in a global e nvironment in which state-of-the-art suppliers may mot always be completel y trusted. What is hard in this environment is establishing and maintainin g trust between the manufacturing components and the integrated circuits a s devices are individualized\, provisioned and certified. This webinar wil l delve into some of the issues that arise and some solutions.\nIntended L earning Outcomes:\nParticipants in this webinar should gain an understandi ng of some of the challenges and solution approaches to developing secure IC products for volume manufacturing.\nIntended audience:\nPracticing desi gn engineers and design managers\, graduate and senior undergraduate stude nts of hardware security and integrated circuit design are the intended au dience for this presentation.\nSpeaker Bio:\nMike Borza is Principal Secur ity Technologist at Synopsys\, Inc. He has more than 25 years of leadershi p and technology experience in security and safety critical systems engine ering. In 2002\, he founded and was CTO of Elliptic Technologies\, acquire d by Synopsys in 2015.  His previous experience includes Chrysalis-ITS (n ow Thales/Gemalto)\, Ankari (now part of HID Global)\, and Alcatel Transpo rt Automation (now Thales Transport). He holds more than 20 US patents. He has been an active contributor to the security task group of IEEE 802.1\, and was an editor of the 802.1 AR secure device identifier standard. He w as a founder member of the prpl Foundation and co-chair of its security en gineering group\, and co-chaired the EEMBC IoT security benchmark working group. He is currently vice-chair of the Accellera IP Security Assurance w orking group. \n \nZoom Information:\nJoin Zoom Meeting\nhttps://ufl.zoom. us/j/904047693\n\nMeeting ID: 904 047 693\n\nOne tap mobile\n+16465588656\ ,\,904047693# US (New York)\n+16699006833\,\,904047693# US (San Jose)\n\nD ial by your location\n+1 646 558 8656 US (New York)\n+1 669 900 6833 US (S an Jose)\nMeeting ID: 904 047 693\nFind your local number: https://ufl.zoo m.us/u/ab5VOI6m6G\n\nJoin by SIP\n904047693@zoomcrc.com\n\nJoin by H.323\n 162.255.37.11 (US West)\n162.255.36.11 (US East)\n221.122.88.195 (China)\n 115.114.131.7 (India Mumbai)\n115.114.115.7 (India Hyderabad)\n213.19.144. 110 (EMEA)\n103.122.166.55 (Australia)\n209.9.211.110 (Hong Kong)\n64.211. 144.160 (Brazil)\n69.174.57.160 (Canada)\n207.226.132.110 (Japan)\nMeeting ID: 904 047 693\n\nJoin by Skype for Business\nhttps://ufl.zoom.us/skype/ 904047693 ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2022/0 8/borza.png CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VEVENT UID:160@mestcenter.org DTSTART;TZID=America/New_York:20210317T120000 DTEND;TZID=America/New_York:20210317T130000 DTSTAMP:20240911T233208Z URL:https://mestcenter.org/training/webinar-thinking-of-logic-locking-be-a ware-of-the-existing-attacks/ SUMMARY:Webinar: Thinking of logic locking? Be Aware of the existing attack s! DESCRIPTION:To watch the recorded webinar\, click on the recording.\nPlay V ideo\nSpeaker:\nDr. Avesta Sasan\, Associate Professor at University of Ca lifornia\, Davis\nAbstract:\nIn this Webinar\, we will review many of thes e attacks and discuss the state of the art attacks that logic encryption s olutions have to resist. The goal of this Webinar is to raise awareness ab out the capabilities of adversaries and existing solutions for attacking a nd decrypting logic encryption solutions.\nSpeaker Bio:\nDr. Sasan receive d his B.Sc. in Computer Engineering from the University of California Irvi ne in 2005 with the highest honor (Summa Cum Laude). He received his M.Sc. and his Ph.D. in Electrical and Computer Engineering from the University of California Irvine in 2006 and 2010\, respectively. In 2010\, Dr. Sasan joined the Office of CTO in Broadcom Co.\, working on the physical design and implementation of ARM processors\, serving as physical designer\, timi ng signoff specialist\, and the lead of signal and power integrity signoff in this team. In 2014 Dr. Sasan was recruited by the Qualcomm office of V LSI technology. In this role\, Dr. Sasan developed different methodologies and in-house EDAs for accurate signoff and analysis of hardened ASIC solu tions. Dr. Sasan joined George Mason University in 2016 as an Associate Pr ofessor in the Department of Electrical and Computer Engineering while sim ultaneously serving as the Associate Chair for Research in this Department . In 2021 Dr. Sasan joined the faculty at the Electrical and Computer Engi neering Department of the University of California Davis. His research spa ns hardware security\, machine learning\, neuromorphic computing\, low pow er design and methodology\, approximate computing\, and the Internet of Th ings (IoT). \n \nZoom Information:\nJoin Zoom Meeting\nhttps://ufl.zoom.us /j/904047693\n\nMeeting ID: 904 047 693\n\nOne tap mobile\n+16465588656\,\ ,904047693# US (New York)\n+16699006833\,\,904047693# US (San Jose)\n\nDia l by your location\n+1 646 558 8656 US (New York)\n+1 669 900 6833 US (San Jose)\nMeeting ID: 904 047 693\nFind your local number: https://ufl.zoom. us/u/ab5VOI6m6G\n\nJoin by SIP\n904047693@zoomcrc.com\n\nJoin by H.323\n16 2.255.37.11 (US West)\n162.255.36.11 (US East)\n221.122.88.195 (China)\n11 5.114.131.7 (India Mumbai)\n115.114.115.7 (India Hyderabad)\n213.19.144.11 0 (EMEA)\n103.122.166.55 (Australia)\n209.9.211.110 (Hong Kong)\n64.211.14 4.160 (Brazil)\n69.174.57.160 (Canada)\n207.226.132.110 (Japan)\nMeeting I D: 904 047 693\n\nJoin by Skype for Business\nhttps://ufl.zoom.us/skype/90 4047693 ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2022/0 8/edit.png CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VEVENT UID:161@mestcenter.org DTSTART;TZID=America/New_York:20210421T120000 DTEND;TZID=America/New_York:20210421T130000 DTSTAMP:20240905T130648Z URL:https://mestcenter.org/training/webinar-security-fpgas-and-the-cloud-f undamentals-of-fpga-accelerated-cloud-security/ SUMMARY:Webinar: Security\, FPGAs\, and the Cloud: Fundamentals of FPGA-Acc elerated Cloud Security DESCRIPTION:To watch the recorded webinar\, click on the recording.\nPlay V ideo\nSpeaker: \nDr. Jakub Szefer\, Associate Professor of Electrical Eng ineering at Yale University\nAbstract: \nThe talk will cover recent resea rch on thermal channels that can be used to create covert channels between users renting same FPGA over time\, FPGA fingerprinting and reverse-engin eering FPGA-enabled data center infrastructures\, and voltage-based channe ls can be used to leak sensitive information across FPGAs (in single-tenan t or multi-tenant settings)\, or can be combined with other existing attac ks to perform cross-talk leakage inside the FPGAs (in multi-tenant setting s).\nSpeaker Bio:\nDr. Jakub Szefer’s research focuses on computer archi tecture and hardware security. His research encompasses secure processor a rchitectures\, cloud security\, FPGA attacks and defenses\, and hardware F PGA implementation of cryptographic algorithms. His research is supported through National Science Foundation and industry grants and donations. He is currently an Associate Professor of Electrical Engineering at Yale Univ ersity\, where he leads the Computer Architecture and Security Laboratory (CASLAB). Prior to joining Yale\, he received Ph.D. and M.A. degrees in El ectrical Engineering from Princeton University\, and B.S. degree with high est honors in Electrical and Computer Engineering from University of Illin ois at Urbana-Champaign. He has received the NSF CAREER award in 2017. Jak ub is the author of first book focusing on processor architecture security : “Principles of Secure Processor Architecture Design”\, published in 2018. Recently\, he has been promoted to the IEEE Senior Member rank in 20 19. Details of Jakub’s research can be found at: https://caslab.csl.yale .edu/~jakubS \n \nZoom Information:\nJoin Zoom Meeting\nhttps://ufl.zoom.u s/j/904047693\n\nMeeting ID: 904 047 693\n\nOne tap mobile\n+16465588656\, \,904047693# US (New York)\n+16699006833\,\,904047693# US (San Jose)\n\nDi al by your location\n+1 646 558 8656 US (New York)\n+1 669 900 6833 US (Sa n Jose)\nMeeting ID: 904 047 693\nFind your local number: https://ufl.zoom .us/u/ab5VOI6m6G\n\nJoin by SIP\n904047693@zoomcrc.com\n\nJoin by H.323\n1 62.255.37.11 (US West)\n162.255.36.11 (US East)\n221.122.88.195 (China)\n1 15.114.131.7 (India Mumbai)\n115.114.115.7 (India Hyderabad)\n213.19.144.1 10 (EMEA)\n103.122.166.55 (Australia)\n209.9.211.110 (Hong Kong)\n64.211.1 44.160 (Brazil)\n69.174.57.160 (Canada)\n207.226.132.110 (Japan)\nMeeting ID: 904 047 693\n\nJoin by Skype for Business\nhttps://ufl.zoom.us/skype/9 04047693 ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2022/0 8/JS.png CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VEVENT UID:92@mestcenter.org DTSTART;TZID=America/New_York:20210505T120000 DTEND;TZID=America/New_York:20210505T130000 DTSTAMP:20240905T130813Z URL:https://mestcenter.org/training/webinar-toward-durable-system-security / SUMMARY:Webinar: Toward Durable System Security DESCRIPTION:To watch the recorded webinar\, click on the recording.\nPlay V ideo\nSpeaker:\nDr. Todd Austin\, University of Michigan / Agita Labs\nAbs tract:\nWouldn't it be nice to have months-to-years of warning that your s ecurity defenses were going to fall\, instead of the usual zero day event where you spend the whole night frantically trying to fix a newly discover ed vulnerability before every junior script kiddie on the planet starts pw n'ing your entire customer base! In this talk\, I'll dive into why today's system security technologies are not very durable and share with you our work toward more durable security defenses. First\, I'll detail the Morphe us secure RISC-V CPU\, which successfully fended off all attacks from 535 cybersecurity researchers recruited by DARPA over a three-month period in the summer of 2020. Morpheus implements a RISC-V extension that supports a lways-encrypted code and pointers with churn. Next\, I'll detail the comme rcialization of Morpheus in the ØZone Secret Processing Unit (SPU)\, a hi gh-security coprocessor for secret computation that is attempting to becom e the first processor to achieve zero software trust\, such that no existi ng software hacks of any kind are capable of penetrating its system securi ty defenses. ØZone creates many avenues for privacy-enhanced computation that could significantly ease the tension between data discovery and data privacy.\nSpeaker Bio:\nTodd Austin is a Professor of Electrical Engineeri ng and Computer Science at the University of Michigan in Ann Arbor. His re search interests include computer architecture\, robust and secure system design\, hardware and software verification\, and performance analysis too ls and techniques. From 2012-2017\, Todd was the director of C-FAR\, the C enter for Future Architectures Research\, a multi-university SRC/DARPA fun ded center that was seeking technologies to scale the performance and effi ciency of future computing systems. Prior to joining academia\, Todd was a Senior Computer Architect in Intel's Microcomputer Research Labs\, a prod uct-oriented research laboratory in Hillsboro\, Oregon. Todd is the first to take credit (but the last to accept blame) for creating the SimpleScala r Tool Set\, a popular collection of computer architecture performance ana lysis tools. Todd is co-author (with Andrew Tanenbaum of Vrije Universitei t) of the undergraduate computer architecture textbook\, "Structured Compu ter Architecture\, 6th Ed." In addition to his work in academia\, Todd is founder of SimpleScalar LLC\, and co-founder of Agita Labs Inc. and InTemp o Design LLC. In 2002\, Todd was a Sloan Research Fellow\, and in 2007 he received the ACM Maurice Wilkes Award for "innovative contributions in Com puter Architecture including the SimpleScalar Toolkit and the DIVA and Raz or architectures." Todd is an IEEE Fellow\, and he received his PhD in Com puter Science from the University of Wisconsin in 1996. \n \nZoom Informat ion:\nJoin Zoom Meeting\nhttps://ufl.zoom.us/j/904047693\n\nMeeting ID: 90 4 047 693\n\nOne tap mobile\n+16465588656\,\,904047693# US (New York)\n+16 699006833\,\,904047693# US (San Jose)\n\nDial by your location\n+1 646 558 8656 US (New York)\n+1 669 900 6833 US (San Jose)\nMeeting ID: 904 047 69 3\nFind your local number: https://ufl.zoom.us/u/ab5VOI6m6G\n\nJoin by SIP \n904047693@zoomcrc.com\n\nJoin by H.323\n162.255.37.11 (US West)\n162.255 .36.11 (US East)\n221.122.88.195 (China)\n115.114.131.7 (India Mumbai)\n11 5.114.115.7 (India Hyderabad)\n213.19.144.110 (EMEA)\n103.122.166.55 (Aust ralia)\n209.9.211.110 (Hong Kong)\n64.211.144.160 (Brazil)\n69.174.57.160 (Canada)\n207.226.132.110 (Japan)\nMeeting ID: 904 047 693\n\nJoin by Skyp e for Business\nhttps://ufl.zoom.us/skype/904047693 ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2022/0 5/Todd-Austin.jpeg CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VEVENT UID:229@mestcenter.org DTSTART;TZID=America/New_York:20210602T120000 DTEND;TZID=America/New_York:20210602T130000 DTSTAMP:20241211T180459Z URL:https://mestcenter.org/training/swatting-the-hardware-security-bugs/ SUMMARY:Swatting the Hardware Security Bugs DESCRIPTION:To watch the recorded webinar\, click on the recording.\nPlay V ideo\nSpeaker \nDr. Jeyavijayan (JV) Rajendran is an Associate Professor and ASCEND Fellow at Texas A&\;M University\n\n \; \n \nZoom Inform ation:\n ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2024/1 2/1598463521714.jpg CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VEVENT UID:91@mestcenter.org DTSTART;TZID=America/New_York:20210616T120000 DTEND;TZID=America/New_York:20210616T130000 DTSTAMP:20240905T131046Z URL:https://mestcenter.org/training/toward-developing-secure-and-privacy-e nhancing-systems-a-retrospection-a-look-ahead/ SUMMARY:Webinar: Toward Developing Secure and Privacy-Enhancing Systems: A Retrospection\, A Look Ahead DESCRIPTION:To watch the recorded webinar\, click on the recording.\nPlay V ideo\nSpeaker: \nDr. Rosario Cammarota\nAbstract:\nAdvances in data priva cy laws create pressures and pain points in the lifecycle of AI and analyt ics products. Industry\, academic\, and government research groups must pr epare and equip working figures to reason\, use\, integrate\, and deploy p rivacy-enhancing technologies\, such as homomorphic encryption\, as part o f the product lifecycle. However\, to meaningfully incorporate such techno logies requires embracing their inherent complexities\, overcoming severe performance taxes\, developing standards and best practices to evolve the secure development lifecycle. I this talk\, I will share both lessons lear ned and a look ahead on the development of computing platforms for enablin g and sustaining the benefits promised by data digitization\, sharing and collaboration\, while protecting regulatory and privacy concerns.\nSpeaker Bio:\n\n\nRo is a Principal Engineer at Intel Labs. He leads privacy tech nologies research theory\, application\, and standardization. His research interests are at the intersection of cryptography\, computing\, system an d hardware security\, focusing on processing encrypted data and its applic ations. He is the Intel principal investigator for the DARPA DPRIVE progra m\, and leads standardization of fully homomorphic encryption at ISO/IEC. Ro is a Senior Member of IEEE. He is a prolific author and inventor and on e of the recipients of the SRC Outstanding Industry Liaison Awards in 2017 \, 2018\, and 2019. He obtained his Ph.D. degree in Computer Science from the University of California\, Irvine\, in 2013.\n\n \n \nZoom Information :\nJoin Zoom Meeting\nhttps://ufl.zoom.us/j/904047693\n\nMeeting ID: 904 0 47 693\n\nOne tap mobile\n+16465588656\,\,904047693# US (New York)\n+16699 006833\,\,904047693# US (San Jose)\n\nDial by your location\n+1 646 558 86 56 US (New York)\n+1 669 900 6833 US (San Jose)\nMeeting ID: 904 047 693\n Find your local number: https://ufl.zoom.us/u/ab5VOI6m6G\n\nJoin by SIP\n9 04047693@zoomcrc.com\n\nJoin by H.323\n162.255.37.11 (US West)\n162.255.36 .11 (US East)\n221.122.88.195 (China)\n115.114.131.7 (India Mumbai)\n115.1 14.115.7 (India Hyderabad)\n213.19.144.110 (EMEA)\n103.122.166.55 (Austral ia)\n209.9.211.110 (Hong Kong)\n64.211.144.160 (Brazil)\n69.174.57.160 (Ca nada)\n207.226.132.110 (Japan)\nMeeting ID: 904 047 693\n\nJoin by Skype f or Business\nhttps://ufl.zoom.us/skype/904047693 ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2022/0 5/Rosario-Commarota.jpeg CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VEVENT UID:135@mestcenter.org DTSTART;TZID=America/New_York:20210707T120000 DTEND;TZID=America/New_York:20210707T130000 DTSTAMP:20240905T131151Z URL:https://mestcenter.org/training/webinar-recent-advances-in-electro-mag netic-hardware-security-and-physical-layer-generic-countermeasures/ SUMMARY:Webinar: Recent Advances in Electro-Magnetic Hardware Security and Physical-layer Generic Countermeasures DESCRIPTION:\n\n\n\nTo watch the recorded webinar\, click on the recording. \nPlay Video\nSpeaker:\nDr. Shreyas Sen\, Elmore Associate Professor of EC E &\; BME at Purdue University\nAbstract:\nIn this talk\, we will cover the following topics in EM/Power Side-Channel Attacks and Countermeasures (a) Threats and impacts of physical side-channels (b) In-depth analysis o f power side-channel and low-overhead generic power-side channel counterme asure through attenuated signature noise injection (ASNI) using in-line cu rrent domain signature attenuation (c) White-box modeling of EM leakage fr om cryptographic ICs starting from Maxwell’s equations and accelerating electrons and analysis of the impact of metal layers on EM information lea kage (d) Generic low-overhead EM side-channel countermeasures (e) Intellig ent EM sniffing using automated algorithmic automated detection of highest leakage-point (f) Machine-Leaning Side-channel attack and techniques for cross-device DL-SCA and (g) countermeasures for ML-SCA (h) a summary of op en problems and future research directions for side-channel attacks and de fenses. We will also briefly discuss about Radiofrequency Physically Unclo nable Functions (RF-PUF).\nSpeaker Bio:\nShreyas Sen is an Elmore Associat e Professor of ECE &\; BME\, Purdue University and received his Ph.D. d egree from ECE\, Georgia Tech. Dr. Sen has over 5 years of industry resear ch experience in Intel Labs\, Qualcomm and Rambus. His current research in terests span mixed-signal circuits/systems and electromagnetics for the In ternet of Things (IoT)\, Biomedical\, and Security. He has authored/co-aut hored 3 book chapters\, over 175 journal and conference papers and has 15 patents granted/pending. Dr.Sen serves as the Director of the Center for I nternet of Bodies( C-IoB). Dr. Sen is the inventor of the Electro-Quasista tic Human Body Communication(EQS-HBC)\, or Body as a Wire technology\, for which\, he is the recipient of the MIT Technology Review top-10 Indian In ventor Worldwide under 35 (MIT TR35 India) Award. His work has been covere d by 250+ news releases worldwide\, invited appearance on TEDx Indianapoli s\, Indian National Television CNBC TV18 Young Turks Program\, NPR subsidi ary Lakeshore Public Radio and the CyberWire podcast. Dr. Sen is a recipie nt of the NSF CAREER Award 2020\, AFOSR Young Investigator Award 2016\, NS F CISE CRII Award 2017\, Intel Outstanding Researcher Award 2020\, Google Faculty Research Award 2017\, Purdue CoE Early Career Research Award 2021\ , Intel Labs Quality Award 2012 for industrywide impact on USB-C type\, In tel Ph.D. Fellowship 2010\, IEEE Microwave Fellowship 2008\, GSRC Margarid a Jacome Best Research Award 2007\, and nine best paper awards including I EEE CICC 2019\, 2021 and in IEEE HOST 2017-2020\, for four consecutive yea rs. Dr. Sen's work was chosen as one of the top-10 papers in the Hardware Security field (TopPicks 2019). He serves/has served as an Associate Edito r for IEEE Solid States Circuits Letters(SSC-L)\, Frontiers in Electronics \, IEEE Design &\; Test\, Executive Committee member of IEEE Central In diana Section and Technical Program Committee member of DAC\, CICC\, IMS\, DATE\, ISLPED\, ICCAD\, ITC\, VLSI Design\, among others. Dr. Sen is a Se nior Member of IEEE.\n\n\n\n \n \nZoom Information:\nJoin Zoom Meeting\nht tps://ufl.zoom.us/j/904047693\n\nMeeting ID: 904 047 693\n\nOne tap mobile \n+16465588656\,\,904047693# US (New York)\n+16699006833\,\,904047693# US (San Jose)\n\nDial by your location\n+1 646 558 8656 US (New York)\n+1 669 900 6833 US (San Jose)\nMeeting ID: 904 047 693\nFind your local number: https://ufl.zoom.us/u/ab5VOI6m6G\n\nJoin by SIP\n904047693@zoomcrc.com\n\n Join by H.323\n162.255.37.11 (US West)\n162.255.36.11 (US East)\n221.122.8 8.195 (China)\n115.114.131.7 (India Mumbai)\n115.114.115.7 (India Hyderaba d)\n213.19.144.110 (EMEA)\n103.122.166.55 (Australia)\n209.9.211.110 (Hong Kong)\n64.211.144.160 (Brazil)\n69.174.57.160 (Canada)\n207.226.132.110 ( Japan)\nMeeting ID: 904 047 693\n\nJoin by Skype for Business\nhttps://ufl .zoom.us/skype/904047693 ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2022/0 5/Shreyas-Sen-150x150-1.jpeg CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VEVENT UID:136@mestcenter.org DTSTART;TZID=America/New_York:20210721T120000 DTEND;TZID=America/New_York:20210721T130000 DTSTAMP:20240905T131333Z URL:https://mestcenter.org/training/webinar-hardware-based-attacks-and-sol utions-on-proprietary-deep-learning-models/ SUMMARY:Webinar: Hardware Based Attacks and Solutions on Proprietary Deep L earning Models DESCRIPTION:To watch the recorded webinar\, click on the recording.\nPlay V ideo\nSpeaker:\nDr. Ankur Srivastava\, Director of Institute for Systems R esearch at University of Maryland\nAbstract:\nDeep learning (DL) algorithm s are extensively used for analyzing big data in several domains including image classification\, natural language processing\, autonomous transport ation\, smart health\, financial management\, social networks\, etc.. The key factors attributed to the unprecedented success of these algorithms ar e (i) availability of a massive and mostly labeled training dataset\, (ii) allocation of powerful computing resources as well as vast amounts of net work training time\, and also (iii) substantial domain expertise of DL mod el developers to obtain highly accurate models. Therefore\, well trained D L models are considered to be intellectual property (IP) of the owner as s ignificant cost is incurred behind their training process to gain a compet itive edge in business.\nSpeaker Bio:\nAnkur Srivastava\, the seventh dire ctor of the Institute for Systems Research\, has a joint appointment in th e Electrical and Computer Engineering Department and ISR. Dr. Srivastava r eceived his B.Tech in Electrical Engineering from Indian Institute of Tech nology Delhi in 1998 and PhD in Computer Science from UCLA in 2002. He was awarded the prestigious Outstanding Dissertation Award from the CS depart ment of UCLA in 2002. His primary research interests lie in the field of h igh performance\, low power and secure electronic systems and applications such as computer vision\, data and storage centers and sensor networks. H e has published numerous papers on these topics at prestigious venues. He has been a part of the technical program &\; organizing committees of s everal conferences such as ICCAD\, DAC\, ISPD\, ICCD\, GLSVLSI\, HOST and others. He has served as the associate editor for IEEE Transactions on VLS I\, IEEE Transactions on CAD and INTEGRATION: VLSI Journal. His research a nd teaching contributions have also been recognized through various awards . \n \nZoom Information:\nJoin Zoom Meeting\nhttps://ufl.zoom.us/j/9040476 93\n\nMeeting ID: 904 047 693\n\nOne tap mobile\n+16465588656\,\,904047693 # US (New York)\n+16699006833\,\,904047693# US (San Jose)\n\nDial by your location\n+1 646 558 8656 US (New York)\n+1 669 900 6833 US (San Jose)\nMe eting ID: 904 047 693\nFind your local number: https://ufl.zoom.us/u/ab5VO I6m6G\n\nJoin by SIP\n904047693@zoomcrc.com\n\nJoin by H.323\n162.255.37.1 1 (US West)\n162.255.36.11 (US East)\n221.122.88.195 (China)\n115.114.131. 7 (India Mumbai)\n115.114.115.7 (India Hyderabad)\n213.19.144.110 (EMEA)\n 103.122.166.55 (Australia)\n209.9.211.110 (Hong Kong)\n64.211.144.160 (Bra zil)\n69.174.57.160 (Canada)\n207.226.132.110 (Japan)\nMeeting ID: 904 047 693\n\nJoin by Skype for Business\nhttps://ufl.zoom.us/skype/904047693 ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2022/0 5/Ankur-Srivastava.png CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VEVENT UID:165@mestcenter.org DTSTART;TZID=America/New_York:20210818T120000 DTEND;TZID=America/New_York:20210818T130000 DTSTAMP:20240905T131426Z URL:https://mestcenter.org/training/webinar-towards-resilient-approaches-f or-detecting-recycled-ics/ SUMMARY:Webinar: Towards Resilient Approaches for Detecting Recycled ICs DESCRIPTION:To watch the recorded webinar\, click on the recording.\nPlay V ideo\nSpeaker: \nDr. Ujjwal Guin\, Auburn University\nAbstract:\nThe recy cling of integrated circuits (ICs) has raised severe problems in ensuring the integrity of today's globalized semiconductor supply chain and poses a serious threat to critical infrastructure due to potentially shorter life time\, lower reliability\, and inferior performance. This talk presents a series of resilient solutions to detect recycled ICs using a ring oscillat or (RO)\, nonvolatile memory\, radio-frequency identification (RFID) tag\, and memory powerup states. A simple measurement device (e.g.\, a smartpho ne) can be used to authenticate a chip under test. These approaches can pr actically be applied to all the chip types that are either in the supply c hain or already in production.\nSpeaker Bio:\nUjjwal Guin is currently an Assistant Professor at the Department of Electrical and Computer Engineeri ng\, Auburn University. He received his Ph.D. degree from the University o f Connecticut in 2016. He is actively involved in projects in the field of Hardware Security and Trust\, Supply Chain Security\, Cybersecurity\, and VLSI Design and Test. He has developed several on-chip structures and tec hniques to improve the security\, trustworthiness\, and reliability of int egrated circuits. His current research interests include Hardware Security &\; Trust\, Blockchain\, Supply Chain Security\, Cybersecurity\, and V LSI Design &\; Test. He is a co-author of the book "Counterfeit Integr ated Circuits: Detection and Avoidance". He has authored several journal a rticles and refereed conference papers. His projects are sponsored by the National Science Foundation (NSF)\, Air Force Research Laboratory (AFRL)\, and Auburn University. \n \nZoom Information:\nJoin Zoom Meeting\nhttps:/ /ufl.zoom.us/j/904047693\n\nMeeting ID: 904 047 693\n\nOne tap mobile\n+16 465588656\,\,904047693# US (New York)\n+16699006833\,\,904047693# US (San Jose)\n\nDial by your location\n+1 646 558 8656 US (New York)\n+1 669 900 6833 US (San Jose)\nMeeting ID: 904 047 693\nFind your local number: https ://ufl.zoom.us/u/ab5VOI6m6G\n\nJoin by SIP\n904047693@zoomcrc.com\n\nJoin by H.323\n162.255.37.11 (US West)\n162.255.36.11 (US East)\n221.122.88.195 (China)\n115.114.131.7 (India Mumbai)\n115.114.115.7 (India Hyderabad)\n2 13.19.144.110 (EMEA)\n103.122.166.55 (Australia)\n209.9.211.110 (Hong Kong )\n64.211.144.160 (Brazil)\n69.174.57.160 (Canada)\n207.226.132.110 (Japan )\nMeeting ID: 904 047 693\n\nJoin by Skype for Business\nhttps://ufl.zoom .us/skype/904047693 ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2022/0 8/Ujjwal-Guin.jpg CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VEVENT UID:170@mestcenter.org DTSTART;TZID=America/New_York:20210916T120000 DTEND;TZID=America/New_York:20210916T130000 DTSTAMP:20240905T131902Z URL:https://mestcenter.org/training/interview-dr-wally-rhines/ SUMMARY:Interview: Dr. Wally Rhines DESCRIPTION:To watch the recorded interview\, click on the recording.\nPlay Video\nSpeaker:\nDr. Wally Rhines\, CEO of Cornami\, Inc.\nSummary:\nDr. Mark Tehranipoor\, Director of FICS Research at the University of Florida\ , sits down virtually with Dr. Wally Rhines\, CEO of Cornami\, to have a c hat about popular topics in the semiconductor industry and hardware securi ty.\nSpeaker Bio:\nWally Rhines is widely recognized as an expert in busin ess value creation and technology for the semiconductor and electronic des ign automation (EDA) industries.\n\nDr. Rhines was CEO of Mentor Graphics (a “Big Three” EDA company with $1.3B+ revenue) for 24 years\, has ser ved on the boards of five public companies\, managed the semiconductor bus iness of Texas Instruments (TI)\, and is a spokesperson\, writer and highl y-sought-after speaker for the high-tech industry delivering more than twe nty keynotes per year.\n\nDr. Rhines currently serves as President and CEO of Cornami\, Inc.\, consults for investors\, corporations and the U.S. go vernment on strategic directions\, value creation and technology and serve s on public and private boards.\n\nBusiness achievements include major tur narounds\, both at Texas Instruments\, through his creation and management of the digital signal processing business\, and at Mentor\, where he mana ged more than 3X growth in revenue and a 10X increase in enterprise value before acquisition by Siemens AG.\n\nDr. Rhines’ technical expertise inc ludes semiconductor design\, technical software development\, process engi neering and manufacturing as well as financial modeling of trends and valu e creation. He has published two books\, one focusing on analytical techni ques for predicting semiconductor business trends and the other relating l ittle known events in the evolution of the semiconductor industry.\n\nHe h as been deeply involved in global business development including projects in China and India.\n\nAs CEO and Director\, he has managed businesses thr ough difficulties including unfriendly takeover attempts\, favorable outco mes for both the company and the activists\, with three of the world's lea ding activist investors\, and volatile economic and business cycles.\n\nHe continues to seek new opportunities to grow businesses\, particularly thr ough private equity\, consulting and personal investing. \n \nZoom Informa tion:\nJoin Zoom Meeting\nhttps://ufl.zoom.us/j/904047693\n\nMeeting ID: 9 04 047 693\n\nOne tap mobile\n+16465588656\,\,904047693# US (New York)\n+1 6699006833\,\,904047693# US (San Jose)\n\nDial by your location\n+1 646 55 8 8656 US (New York)\n+1 669 900 6833 US (San Jose)\nMeeting ID: 904 047 6 93\nFind your local number: https://ufl.zoom.us/u/ab5VOI6m6G\n\nJoin by SI P\n904047693@zoomcrc.com\n\nJoin by H.323\n162.255.37.11 (US West)\n162.25 5.36.11 (US East)\n221.122.88.195 (China)\n115.114.131.7 (India Mumbai)\n1 15.114.115.7 (India Hyderabad)\n213.19.144.110 (EMEA)\n103.122.166.55 (Aus tralia)\n209.9.211.110 (Hong Kong)\n64.211.144.160 (Brazil)\n69.174.57.160 (Canada)\n207.226.132.110 (Japan)\nMeeting ID: 904 047 693\n\nJoin by Sky pe for Business\nhttps://ufl.zoom.us/skype/904047693 ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2022/0 8/WallyRhines.jpg CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VEVENT UID:169@mestcenter.org DTSTART;TZID=America/New_York:20210929T120000 DTEND;TZID=America/New_York:20210929T130000 DTSTAMP:20240905T131706Z URL:https://mestcenter.org/training/interview-serge-leef/ SUMMARY:Interview: Serge Leef DESCRIPTION:To watch the recorded Interview\, click on the recording.\nPlay Video\nSpeaker:\nSerge Leef\, Head of Azure for Secure Microelectronics a t Microsoft\nSummary:\nSerge Leef\, Design Automation and Hardware Securit y Program Manager at DARPA\, talks to Dr. Mark Tehranipoor\, Director of F ICS Research\, about microelectronics security. Look forward to hearing a discussion about the state of the semiconductor and EDA industry and the n ew initiatives and future of hardware security.\nSpeaker Bio:\nAfter 4 yea rs of national service at DARPA\, Serge Leef joined Microsoft's Azure busi ness in March of 2022 to pursue the vision of cloud based secure microelec tronics design\, implementation\, and fabrication enablement.\n\nAt DARPA\ , Serge was responsible for Secure Silicon\, Next Generation Design Tools\ , and Domestic Microelectronics program portfolio.\n\nPrior to the DARPA a ppointment\, Serge worked at Siemens EDA (formerly Mentor Graphics)\, wher e from 2010 until 2018 he was a Vice President of New Ventures\, responsib le for identifying and developing technology and business opportunities in systems-oriented markets. Additionally\, from 1999 to 2018\, he served as a division General Manager\, responsible for defining strategies and buil ding successful businesses around design automation products in the areas of hardware/software co-design\, multi-physics simulation\, IP integration \, SoC optimization\, design data management\, automotive/aerospace networ king\, cloud-based electronic design\, Internet of Things (IoT) infrastruc ture\, and hardware cybersecurity.\n\nPrior to joining Mentor\, he was res ponsible for design automation at Silicon Graphics\, where he and his team created revolutionary\, high-speed simulation tools to enable the design of high-speed 3D graphics chips\, which defined the state-of-the-art in vi sualization\, imaging\, gaming\, and special effects for a decade. Earlier in his career\, he managed a CAE/CAD organization at Microchip and develo ped functional and physical design and verification tools for major 8- and 16-bit microcontroller and microprocessor programs at Intel.\n\nSerge rec eived his Bachelor of Science degree in electrical engineering and Master of Science degree in computer science from Arizona State University. He ha s served on corporate\, state\, and academic advisory boards\, delivered n umerous public speeches\, and holds patents in hardware Trojan detection a nd Internet of Things (loT) infrastructure. \n \nZoom Information:\nJoin Z oom Meeting\nhttps://ufl.zoom.us/j/904047693\n\nMeeting ID: 904 047 693\n\ nOne tap mobile\n+16465588656\,\,904047693# US (New York)\n+16699006833\,\ ,904047693# US (San Jose)\n\nDial by your location\n+1 646 558 8656 US (Ne w York)\n+1 669 900 6833 US (San Jose)\nMeeting ID: 904 047 693\nFind your local number: https://ufl.zoom.us/u/ab5VOI6m6G\n\nJoin by SIP\n904047693@ zoomcrc.com\n\nJoin by H.323\n162.255.37.11 (US West)\n162.255.36.11 (US E ast)\n221.122.88.195 (China)\n115.114.131.7 (India Mumbai)\n115.114.115.7 (India Hyderabad)\n213.19.144.110 (EMEA)\n103.122.166.55 (Australia)\n209. 9.211.110 (Hong Kong)\n64.211.144.160 (Brazil)\n69.174.57.160 (Canada)\n20 7.226.132.110 (Japan)\nMeeting ID: 904 047 693\n\nJoin by Skype for Busine ss\nhttps://ufl.zoom.us/skype/904047693 ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2022/0 5/Serge-Leef-150x150-1.jpeg CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VEVENT UID:90@mestcenter.org DTSTART;TZID=America/New_York:20211006T120000 DTEND;TZID=America/New_York:20211006T130000 DTSTAMP:20240905T132130Z URL:https://mestcenter.org/training/practical-security-soc-design-consider ations-making-the-transition-from-the-lab-to-the-fab/ SUMMARY:Webinar: Toward Agile and Open Electronic Design Automation DESCRIPTION:To watch the recorded webinar\, click on the recording.\nPlay V ideo\nSpeaker: \nDr. David Pan\, The University of Texas at Austin\nAbstr act:\nThis talk will present some recent trends and efforts toward agile a nd open electronic design automation (EDA)\, in particular leveraging AI/m achine learning with domain-specific customizations. I will first show how we leverage deep learning hardware and software to develop an open-source VLSI placement engine\, DREAMPlace [DAC’19 Best Paper Award\, TCAD 2020 ]\, which is around 40x faster than the previous state-of-the-art academic global placer with high quality. DREAMPlace 2.0 and 3.0 have also been re leased to tackle detailed placement acceleration and region constraints.  I will then present the DARPA-funded project MAGICAL which leverages both machine and human intelligence to produce fully automated analog layouts from netlists to GDSII. MAGICAL 1.0 has been open-sourced\, and validated with a silicon-proven 40nm 1GS/s ∆Σ ADC [CICC’21]. I will also discus s the challenges and opportunities.\nSpeaker Bio: \nDr. David Z. Pan is a Professor in the Department of Electrical &\; Computer Engineering at The University of Texas at Austin and holds the Silicon Laboratories Endow ed Chair in Electrical Engineering.\n\nHe received his B.S. degree from Pe king University\, and his M.S./Ph.D. degrees from University of California at Los Angeles (UCLA). From 2000 to 2003\, he was a Research Staff Member with the IBM T. J. Watson Research Center\, Yorktown Heights\, NY. His re search is mainly focused on electronic design automation\, synergistic AI /IC co-optimizations\, domain-specific accelerators\, design for manufactu ring\, hardware security\, and design/CAD for analog/mixed-signal and emer ging technologies. He has published over 420 technical papers in refereed journals and conferences\, and is the holder of 8 U.S. patents. He has h eld various advisory\, consulting\, or visiting positions in academia and industry\, such as MIT and Google. He has graduated over 40 PhD/postdoc st udents at UT Austin who are now holding key academic and industry position s.\n\nHe has served as a Senior Associate Editor of ACM Transactions on De sign Automation of Electronic Systems (TODAES)\, an Associate Editor of IE EE Design &\; Test\, IEEE Transactions on CAD\, IEEE Transactions on VL SI\, IEEE Transactions on CAS-I\, IEEE Transactions on CAS-II\, IEEE CAS S ociety Newsletter\, Science China Information Sciences\, and Journal of Co mputer Science and Technology. He has served in the Executive and Program Committees of many major conferences\, including DAC\, ICCAD\, ASPDAC\, an d ISPD. He has served as the General Chair of ICCAD 2019 and ISPD 2008\, P rogram Chair of ICCAD 2018 and ASPDAC 2017\, and DAC 2014 Tutorial Chair  and DAC 2022 Panel Chair. He served in the ACM/SIGDA Executive Committee  as the Award Chair from 2018 to 2021.\n\nHe has received the 2013 SRC Te chnical Excellence Award\, DAC Top 10 Author in Fifth Decade\, DAC Prolifi c Author Award\, ASP-DAC Frequently Cited Author Award\, 20 Best Paper A wards (TCAD 2021\, ISPD 2020\, ASP-DAC 2020\, DAC 2019\, GLSVLSI 2018\, V LSI Integration 2018\, HOST 2017\, SPIE-AL 2016\, ISPD 2014\, ICCAD 2013\, ASPDAC 2012\, ISPD 2011\, IBM Research Pat Goldberg Memorial Best Paper A ward 2010 in CS/EE/Math\, ASPDAC 2010\, DATE 2009\, ICICDT 2009\, SRC Tech con 2015\, 2012\, 2007 and 1998)\, Communications of the ACM Research High lights (2014)\, ACM/SIGDA Outstanding New Faculty Award (2005)\, NSF CAREE R Award (2007)\, UCLA Engineering Distinguished Young Alumnus Award (2009) \, UT Austin RAISE Faculty Excellence Award (2014)\, IBM Faculty Award fou r times\, SRC Inventor Recognition Award three times\, Cadence Academic Co llaboration Award (2019)\, and a number of international CAD contest award s\, among others. His students have won many awards\, including the First Place of ACM Student Research Competition Grand Finals twice in 2018 an d 2021\, ACM/SIGDA Student Research Competition Gold Medal (three times)\, ACM Outstanding PhD Dissertation in EDA (twice)\, EDAA Outstanding Disser tation Award (twice)\, and so on. He is a Fellow of ACM\, IEEE and SPIE.\n \n\n \;\n\n \n \nZoom Information:\nJoin Zoom Meeting\nhttps://ufl.zoo m.us/j/904047693\n\nMeeting ID: 904 047 693\n\nOne tap mobile\n+1646558865 6\,\,904047693# US (New York)\n+16699006833\,\,904047693# US (San Jose)\n\ nDial by your location\n+1 646 558 8656 US (New York)\n+1 669 900 6833 US (San Jose)\nMeeting ID: 904 047 693\nFind your local number: https://ufl.z oom.us/u/ab5VOI6m6G\n\nJoin by SIP\n904047693@zoomcrc.com\n\nJoin by H.323 \n162.255.37.11 (US West)\n162.255.36.11 (US East)\n221.122.88.195 (China) \n115.114.131.7 (India Mumbai)\n115.114.115.7 (India Hyderabad)\n213.19.14 4.110 (EMEA)\n103.122.166.55 (Australia)\n209.9.211.110 (Hong Kong)\n64.21 1.144.160 (Brazil)\n69.174.57.160 (Canada)\n207.226.132.110 (Japan)\nMeeti ng ID: 904 047 693\n\nJoin by Skype for Business\nhttps://ufl.zoom.us/skyp e/904047693 ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2022/0 5/David-Pan.jpg CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VEVENT UID:95@mestcenter.org DTSTART;TZID=America/New_York:20211117T120000 DTEND;TZID=America/New_York:20211117T130000 DTSTAMP:20240905T132251Z URL:https://mestcenter.org/training/automating-hardware-security-property- generation/ SUMMARY:Webinar: Automating Hardware Security Property Generation DESCRIPTION:To watch the recorded webinar\, click on the recording.\nPlay V ideo\nSpeaker: \nDr. Ryan Kastner\, University of California\, San Diego\ nAbstract:\nThis talk describes a series of automated techniques to help g enerate security properties. Our initial goal aims to provide insights int o the designs that can be used to help derive properties. Our ambitious lo ng-term goal is to automate the security property generation process using limited human input.\n\nSpeaker Bio:\n\nRyan Kastner is a professor in the Department of Computer Science and Engineering at the University of Ca lifornia\, San Diego. He received a PhD in Computer Science (2002) at UCL A\, a Masters degree in engineering (2000) and Bachelor degrees (BS) in bo th Electrical Engineering and Computer Engineering (1999) from Northwester n University. He spent the first five years after his PhD as a professor i n the Department of Electrical and Computer Engineering at the University of California\, Santa Barbara. He has published over 200 technical article s and has authored four books.\n\n\n \;\n\n \n \nZoom Information:\nJo in Zoom Meeting\nhttps://ufl.zoom.us/j/904047693\n\nMeeting ID: 904 047 69 3\n\nOne tap mobile\n+16465588656\,\,904047693# US (New York)\n+1669900683 3\,\,904047693# US (San Jose)\n\nDial by your location\n+1 646 558 8656 US (New York)\n+1 669 900 6833 US (San Jose)\nMeeting ID: 904 047 693\nFind your local number: https://ufl.zoom.us/u/ab5VOI6m6G\n\nJoin by SIP\n904047 693@zoomcrc.com\n\nJoin by H.323\n162.255.37.11 (US West)\n162.255.36.11 ( US East)\n221.122.88.195 (China)\n115.114.131.7 (India Mumbai)\n115.114.11 5.7 (India Hyderabad)\n213.19.144.110 (EMEA)\n103.122.166.55 (Australia)\n 209.9.211.110 (Hong Kong)\n64.211.144.160 (Brazil)\n69.174.57.160 (Canada) \n207.226.132.110 (Japan)\nMeeting ID: 904 047 693\n\nJoin by Skype for Bu siness\nhttps://ufl.zoom.us/skype/904047693 ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2022/0 5/ryan-kastner.jpg CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VEVENT UID:80@mestcenter.org DTSTART;TZID=America/New_York:20211215T120000 DTEND;TZID=America/New_York:20211215T130000 DTSTAMP:20240905T132401Z URL:https://mestcenter.org/training/webinar-security-attacks-and-defenses- of-the-micro-op-cache-and-the-processor-frontend/ SUMMARY:Webinar: Security Attacks and Defenses of the Micro-Op Cache and th e Processor Frontend DESCRIPTION:To watch the recorded webinar\, click on the recording.\nPlay V ideo\nSpeaker: \nDr. Jakub Szefer and Shuwen Deng\nAbstract: \nRecently\ , a set of new security threats abusing operation of the processor fronten d has been publicized in top architecture conferences\, including ISCA 202 1\, MICRO 2021\, and the upcoming HPCA 2022.  The new\, previously not co nsidered threats target the processor frontend which is composed of the Mi cro-Instruction Translation Engine (MITE)\, Decode Stream Buffer (DSB)\, a lso called the Micro-op Cache\, and Loop Stream Detector (LSD).  Processo rs from major vendors are currently known to be vulnerable to these threat s.  With the quickly evolving state-of-the-art processor frontend securit y\, this seminar aims to give an up-to-date and concise introduction to th e processor frontend and the security issues it brings about. The root cau ses of the security threats are the multiple paths in the processor fronte nd that the micro-ops can take while being decoded: through the MITE\, DSB (also called the Micro-op Cache)\, or through the LSD. Each path has its own unique timing and power signatures\, which lead to the new types of si de- and covert- channel attacks\, which this seminar will overview. The ne w threats are especially stealthy as they bypass many existing defenses su ch as hardware defenses for the caches. The new attacks happen before or w hile the instructions are decoded into micro-ops while majority of the exi sting\, well-known attacks has focused on the operation of the processor b ackend. Moreover\, the new security threats are not limited to multi-threa ding\, and researchers have shown ways for leaking execution information o f SGX enclaves or different\, new variants of Spectre attacks\, for exampl e. The seminar will end by covering potential defenses to these new types of threats and highlight research challenges in creating secure processors .\n\n \;\n\nIntended Learning Outcomes (ILOs):\n\nUpon the completion of this webinar\, trainees should be able to:\n\n Understand architecture s of modern processor frontends\n Understand designs of Micro Instruction Translation Engine (MITE)\, Decode Stream Buffer (DSB)\, also called the Micro-op Cache\, and Loop Stream Detector (LSD)\n Understand new\, recent ly presented covert- and side-channel attacks leveraging the processor fro ntend components\n Understand possible defenses for the recently presente d processor frontend attacks\n\nTarget Audience:\n\nDesign engineers\, sen ior undergraduate students\, graduate students\, and decision-makers who a re interested in understanding the sources of security attacks on modern c omputer processors\, and research challenges which they bring about.\n\n&n bsp\;\nSpeaker Bios:\n\n\nDr. Jakub Szefer’s research focuses on compute r architecture and hardware security. His research encompasses secure proc essor architectures\, cloud security\, FPGA attacks and defenses\, and har dware FPGA implementation of cryptographic algorithms. His research is sup ported through National Science Foundation and industry grants and donatio ns. He is currently an Associate Professor of Electrical Engineering at Ya le University\, where he leads the Computer Architecture and Security Labo ratory (CASLAB). Prior to joining Yale\, he received Ph.D. and M.A. degree s in Electrical Engineering from Princeton University\, and B.S. degree wi th highest honors in Electrical and Computer Engineering from University o f Illinois at Urbana-Champaign. He has received the NSF CAREER award in 20 17. Jakub is the author of first book focusing on processor architecture s ecurity: “Principles of Secure Processor Architecture Design”\, publis hed in 2018. Recently\, he has been promoted to the IEEE Senior Member ran k in 2019. Details of Jakub’s research can be found at: https://caslab.c sl.yale.edu/~jakubS\n\nShuwen Deng is a final-year Ph.D. candidate at Yale University. Her research interests span computer architecture and securit y. Especially\, she focuses on developing and verifying secure processor m icroarchitectures by developing side-channel vulnerability checking scheme s\, as well as proposing tools for developing practical and scalable secur ity hardware architectural defenses.  She is also interested in security verification. She is the recipient of the 2020 Google Fellowship in Privac y and Security and a Elihu Elias Dickerman Fellowship. She is currently on the job market.\n\n \n \nZoom Information:\nJoin Zoom Meeting\nhttps://uf l.zoom.us/j/904047693\n\nMeeting ID: 904 047 693\n\nOne tap mobile\n+16465 588656\,\,904047693# US (New York)\n+16699006833\,\,904047693# US (San Jos e)\n\nDial by your location\n+1 646 558 8656 US (New York)\n+1 669 900 683 3 US (San Jose)\nMeeting ID: 904 047 693\nFind your local number: https:// ufl.zoom.us/u/ab5VOI6m6G\n\nJoin by SIP\n904047693@zoomcrc.com\n\nJoin by H.323\n162.255.37.11 (US West)\n162.255.36.11 (US East)\n221.122.88.195 (C hina)\n115.114.131.7 (India Mumbai)\n115.114.115.7 (India Hyderabad)\n213. 19.144.110 (EMEA)\n103.122.166.55 (Australia)\n209.9.211.110 (Hong Kong)\n 64.211.144.160 (Brazil)\n69.174.57.160 (Canada)\n207.226.132.110 (Japan)\n Meeting ID: 904 047 693\n\nJoin by Skype for Business\nhttps://ufl.zoom.us /skype/904047693 ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2022/0 2/jakub.jpg CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VEVENT UID:81@mestcenter.org DTSTART;TZID=America/New_York:20220119T120000 DTEND;TZID=America/New_York:20220119T130000 DTSTAMP:20240725T205729Z URL:https://mestcenter.org/training/webinar-secure-mixed-signal-integrated -circuits-protection-through-obfuscation/ SUMMARY:Webinar: Secure Mixed-Signal Integrated Circuits: Protection Throug h Obfuscation DESCRIPTION:Speaker: \nDr. Ioannis Savidis\, Associate Professor\, Drexel University\nAbstract:\nThe globalization of the integrated circuit supply chain has resulted in an increase in untrusted third parties\nthroughout t he circuit design and manufacturing flow. Circuit obfuscation is explored as a means\nto protect intellectual property (IP) in the digital\, analog\ , and RF domains. First\, an introduction to\npossible vulnerabilities of digital and analog/RF IP is provided. Once primary threat models are defin ed\,\ntechniques developed by my research group to protect digital circuit s from reverse engineering and cloning\nare described. Specifically\, circ uit techniques and methodologies developed to optimize logic locking of\nb oth the combinatorial and sequential components of a digital circuit will be discussed.\nThe second half of my presentation focuses on the challenge s and benefits of securing analog and RF\ncircuit blocks. Design considera tions for analog circuits significantly differ from digital blocks and inc lude\ngreater precision in biasing conditions\, greater sensitivity to noi se and temperature\, greater emphasis on\nsignal integrity\, tighter noise margins\, and simultaneous consideration of multiple circuit parameters. By\naccounting for these circuit considerations\, my research group has de veloped techniques to obfuscate\ncircuit parameters including the gain\, b andwidth\, target frequency\, and biasing points of analog blocks\,\nwhich will be discussed as a means to prevent theft and reverse engineering. Th e high level objective of\nthe presentation is to elicit a discussion on c urrent and future research trends in the area of analog/RF\nmixed-signal I P protection.\nSpeaker Bio:\n\n\nIoannis Savidis (S’03-M’13-SM’18) r eceived the B.S.E. degree in electrical and computer engineering and biome dical engineering from Duke University\, Durham\, NC\,USA\, in 2005\, and the M.Sc. and Ph.D. degrees in electrical and computer engineering from th e University of Rochester\, Rochester\, NY\, USA\, in 2007 and 2013\, resp ectively. He is currently an Associate Professor with the Department of El ectrical and Computer Engineering\, Drexel University\, Philadelphia\, PA\ , USA\, where he directs the Integrated Circuits and Electronics (ICE) Des ign and Analysis Laboratory.\nHis current research interests include analy sis\, modeling\, and design methodologies for high-performance digital and mixed-signal integrated circuits\, power management and low-power design for system-on-chip and microprocessor circuits\, IC hardware security and trust\, analog circuit security and obfuscation\, and power and clock deli very for heterogeneous 2-D and 3-D circuits.\nDr. Savidis is an Editorial Board Member of the IEEE Transactions on Very Large Scale Integration Syst ems\, the Microelectronics Journal\, and the Journal of Circuits\, Systems and Computers. He serves on the organizing committees of the IEEE Interna tional Symposium on Hardware Oriented Security and Trust (HOST)\, the Grea t Lakes Symposium on Very Large Scale Integration (GLSVLSI)\, the Internat ional Symposium on Circuits and Systems (ISCAS)\, and the International Ve rification and Security Workshop (IVSW). He is a recipient of the 2018 NSF CAREER Award for his proposal entitled\, “Parameter Obfuscation: A Nove l Methodology for the Protection of Analog Intellectual\nProperty” and t he 2019 DoD Defense University Research Instrumentation Program (DURIP) th rough the Office of Naval Research for his proposal entitled\, “Testbed for Experimental Validation of Security Techniques.”\n\n \n \nZoom Infor mation:\nJoin Zoom Meeting\nhttps://ufl.zoom.us/j/904047693\n\nMeeting ID: 904 047 693\n\nOne tap mobile\n+16465588656\,\,904047693# US (New York)\n +16699006833\,\,904047693# US (San Jose)\n\nDial by your location\n+1 646 558 8656 US (New York)\n+1 669 900 6833 US (San Jose)\nMeeting ID: 904 047 693\nFind your local number: https://ufl.zoom.us/u/ab5VOI6m6G\n\nJoin by SIP\n904047693@zoomcrc.com\n\nJoin by H.323\n162.255.37.11 (US West)\n162. 255.36.11 (US East)\n221.122.88.195 (China)\n115.114.131.7 (India Mumbai)\ n115.114.115.7 (India Hyderabad)\n213.19.144.110 (EMEA)\n103.122.166.55 (A ustralia)\n209.9.211.110 (Hong Kong)\n64.211.144.160 (Brazil)\n69.174.57.1 60 (Canada)\n207.226.132.110 (Japan)\nMeeting ID: 904 047 693\n\nJoin by S kype for Business\nhttps://ufl.zoom.us/skype/904047693 ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2022/0 2/Savidis_2013_10_30-scaled.jpeg CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VEVENT UID:74@mestcenter.org DTSTART;TZID=America/New_York:20220202T120000 DTEND;TZID=America/New_York:20220202T130000 DTSTAMP:20240905T132605Z URL:https://mestcenter.org/training/webinar-efficient-and-reliable-deep-le arning-at-scale-hardware-and-software/ SUMMARY:Webinar: Efficient and Reliable Deep Learning at Scale: Hardware an d Software DESCRIPTION:To watch the recorded webinar\, click on the recording.\nPlay V ideo\nSpeaker:\nDr. Yiran Chen\, Duke University\nAbstract:\nThe rapid gro wth of modern neural network models’ scale generates ever-increasing dem ands for high computing power of Artificial Intelligence (AI) systems. Man y specialized computing devices have been also deployed in the AI systems\ , forming a truly application-driven heterogeneous computing platform. Thi s talk discusses the importance of hardware/software co-design in the deve lopment of AI computing systems. We first use resistive memory based Neura l Network (NN) accelerators to illustrate the design philosophy of heterog eneous AI computing systems\, and then present several hardware-friendly e fficient neural network model design techniques. We also extend our discus sions to the reliability and robustness of memristor-based AI systems and introduce algorithmic and system solutions to improve the robustness of su ch systems. A research roadmap of our relevant research is given at the en d of the talk.\nSpeaker Bio:\nDr. Yiran Chen received B.S (1998) and M.S. (2001) from Tsinghua University and Ph.D. (2005) from Purdue University. A fter five years in industry\, he joined University of Pittsburgh in 2010 a s Assistant Professor and then was promoted to Associate Professor with te nure in 2014\, holding Bicentennial Alumni Faculty Fellow. He is now the P rofessor of the Department of Electrical and Computer Engineering at Duke University and serving as the director of the NSF AI Institute for Edge Co mputing Leveraging the Next-generation Networks (Athena) and the NSF Indus try–University Cooperative Research Center (IUCRC) for Alternative Susta inable and Intelligent Computing (ASIC)\, and the co-director of Duke Cent er for Computational Evolutionary Intelligence (CEI). His group focuses on the research of new memory and storage systems\, machine learning and neu romorphic computing\, and mobile computing systems. Dr. Chen has published 1 book and about 500 technical publications and has been granted 96 US pa tents. He has served as the associate editor of a dozen international acad emic transactions/journals and served on the technical and organization co mmittees of more than 60 international conferences. He is now serving as t he Editor-in-Chief of the IEEE Circuits and Systems Magazine. He received eight best paper awards\, one best poster award\, and fourteen best paper nominations from international conferences and workshops. He received nume rous awards for his technical contributions and professional services. He is a Fellow of the ACM and IEEE and now serves as the chair of ACM SIGDA. \n \nZoom Information:\nJoin Zoom Meeting\nhttps://ufl.zoom.us/j/904047693 \n\nMeeting ID: 904 047 693\n\nOne tap mobile\n+16465588656\,\,904047693# US (New York)\n+16699006833\,\,904047693# US (San Jose)\n\nDial by your lo cation\n+1 646 558 8656 US (New York)\n+1 669 900 6833 US (San Jose)\nMeet ing ID: 904 047 693\nFind your local number: https://ufl.zoom.us/u/ab5VOI6 m6G\n\nJoin by SIP\n904047693@zoomcrc.com\n\nJoin by H.323\n162.255.37.11 (US West)\n162.255.36.11 (US East)\n221.122.88.195 (China)\n115.114.131.7 (India Mumbai)\n115.114.115.7 (India Hyderabad)\n213.19.144.110 (EMEA)\n10 3.122.166.55 (Australia)\n209.9.211.110 (Hong Kong)\n64.211.144.160 (Brazi l)\n69.174.57.160 (Canada)\n207.226.132.110 (Japan)\nMeeting ID: 904 047 6 93\n\nJoin by Skype for Business\nhttps://ufl.zoom.us/skype/904047693 ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2022/0 1/Yiran-4x5-2.jpg CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VEVENT UID:75@mestcenter.org DTSTART;TZID=America/New_York:20220216T120000 DTEND;TZID=America/New_York:20220216T130000 DTSTAMP:20240905T133002Z URL:https://mestcenter.org/training/webinar-securing-neural-networks-again st-side-channel-attacks-with-hardware-masking/ SUMMARY:Webinar: Securing Neural Networks Against Side-Channel Attacks with Hardware Masking DESCRIPTION:To watch the recorded webinar\, click on the recording.\nPlay V ideo\nSpeaker: \nDr. Aydin Aysu\, North Carolina State University\nAbstra ct:\nIntellectual Property (IP) thefts of trained machine learning (ML) mo dels through side-channel attacks on inference engines are becoming a majo r threat.  Indeed\, several recent works have shown reverse engineering o f the model internals using such attacks\, but the research on building de fenses is largely unexplored.  There is a critical need to efficiently an d securely transform those defenses from cryptography to ML frameworks.  A common defense technique is called masking\, which randomizes all inter mediate computations while preserving the same functionality.  Although m asking is well-known for cryptography its extension to ML is non-trivial.   In this talk\, I will explain different mechanisms to mask neural netwo rks in hardware and describe related opportunities and challenges.  I wil l first discuss how a straightforward masking adaptation leaks side-channe l information on neural networks and how to address this vulnerability.  I will then describe a fundamentally new approach that redefines neural n etworks to make them easier to mask in hardware.\nSpeaker Bio:\nDr.  Aydi n Aysu is currently an assistant professor and Bennett Faculty Fellow at the Electrical and Computer Engineering Department of North Carolina Stat e University\, where he leads HECTOR: Hardware Cybersecurity Research Lab.   He got his M.S from Sabanci University in Istanbul\, Turkey\, and his P h.D. from Virginia Tech. Before joining NC State\, he was a post-doctoral researcher at the University of Texas at Austin.  Dr. Aysu's interests a re broadly on hardware security research and cybersecurity education.  He has won the 2019 NC State Faculty Development Award\, 2019 NSF Research I nitiative (CRII) award\, the 2020 Bennett Faculty award\, and the 2020 NSF  CAREER award.  His papers have been nominated for the best paper award both at 2018 and 2019 IEEE HOST conferences and have won the best paper a ward at 2019 GLS-VLSI and 2020 DATE conferences.  He is an IEEE senior me mber. \n \nZoom Information:\nJoin Zoom Meeting\nhttps://ufl.zoom.us/j/904 047693\n\nMeeting ID: 904 047 693\n\nOne tap mobile\n+16465588656\,\,90404 7693# US (New York)\n+16699006833\,\,904047693# US (San Jose)\n\nDial by y our location\n+1 646 558 8656 US (New York)\n+1 669 900 6833 US (San Jose) \nMeeting ID: 904 047 693\nFind your local number: https://ufl.zoom.us/u/a b5VOI6m6G\n\nJoin by SIP\n904047693@zoomcrc.com\n\nJoin by H.323\n162.255. 37.11 (US West)\n162.255.36.11 (US East)\n221.122.88.195 (China)\n115.114. 131.7 (India Mumbai)\n115.114.115.7 (India Hyderabad)\n213.19.144.110 (EME A)\n103.122.166.55 (Australia)\n209.9.211.110 (Hong Kong)\n64.211.144.160 (Brazil)\n69.174.57.160 (Canada)\n207.226.132.110 (Japan)\nMeeting ID: 904 047 693\n\nJoin by Skype for Business\nhttps://ufl.zoom.us/skype/90404769 3 ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2022/0 1/aysu-journal-bio-image.jpg CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VEVENT UID:79@mestcenter.org DTSTART;TZID=America/New_York:20220302T120000 DTEND;TZID=America/New_York:20220302T130000 DTSTAMP:20240905T133104Z URL:https://mestcenter.org/training/webinar-securing-neural-networks-again st-side-channel-attacks-with-hardware-masking-2/ SUMMARY:Webinar: IP Protection through Logic Locking: What to Expect From t he State-of-the-art Techniques DESCRIPTION:To watch the recorded webinar\, click on the recording.\nPlay V ideo\nSpeaker: \nDrs. Kimia Zamiri Azar and Hadi Mardani Kamali\, Univers ity of Florida\nAbstract:\nPlunged in the globalization ocean of IC supply chain\, where multiple parties play crucial roles through Integrated Circ uit (IC) manufacturing\, with the involvement of diverse hardware componen ts from third-party vendors\, i.e. Intellectual Property (IP) components\, guaranteeing the security of these components against various threats is paramount. An effective hardware security countermeasure against such thre ats is the use of locking and activation through untrusted IC supply chain stages where multiple entities and potential malicious parties are involv ed in. Locking a logic (aka. Logic Locking) can be performed at different levels of abstraction on a hardware IP. With much research carried out so far in the community\, the applicability\, feasibility\, and efficacy of t his approach have been investigated including metrics to assess the effica cy\, impact of locking in different levels of abstraction\, threat model d efinition\, resiliency against physical attacks\, tampering\, and the appl ication of machine learning. This webinar\, by elaborating the principals and fundamentals of logic locking\, will draw a holistic demonstration of state-of-the-art\, in both defensive and attacking sides. This webinar als o covers and evaluates current trends in logic locking with the possible c hanges in threat models\, security metrics\, and implementation trade-offs .\nSpeaker Bios:\n\n\nKimia Zamiri Azar is a postdoctoral research associa te in the Department of Electrical and Computer Engineering at the Univers ity of Florida. She received a Ph.D. degree from the Department of Electri cal and Computer Engineering at George Mason University in 2021. She also received her M.S. and B.S. from the Department of Electrical and Computer Engineering at Shahid Beheshti University\, 2015\, and K. N. T. University \, 2013\, respectively. Her research interests span hardware security and trust\, supply chain security\, System-on-Chips security validation and ve rification\, and IoT security. She has multiple publications in high-prest igious journals and conferences\, including IEEE Transactions on Computers \, IEEE Transactions on VLSI\, IACR Transactions on Cryptographic Hardware and Embedded Systems (CHES)\, and Design Automation Conference (DAC)\, wi th awards including nominations for Best Paper Award in IEEE Computer Soci ety Annual Symposium on VLSI (ISVLSI)’20 and IEEE/ACM Conference on Comp uter-Aided-Design (ICCAD)’20.\n\n\n\nHadi Mardani Kamali is a postdoctor al research associate at Florida Institute for Cybersecurity Research (FIC S)\, the Department of Electrical and Computer Engineering at the Universi ty of Florida. He received his Ph.D. degree from the Department of Electri cal and Computer Engineering at George Mason University\, 2021. He receive d his M.S. and B.S. from the Department of Electrical and Computer Enginee ring at Sharif University of Technology\, 2013\, and K. N. T. University\, 2011\, respectively. His research delves into hardware security with a pa rticular focus on exploiting IP protection techniques\, design-for-trust f or VLSI circuits\, and CAD frameworks for security (design-for-security)\, in which he has numerous publications in top journals and conferences inc luding IEEE Transactions on Computers\, IEEE Transactions on VLSI\, IACR T ransactions on Cryptographic Hardware and Embedded Systems (CHES)\, and De sign Automation Conference (DAC)\, with awards including nominations for B est Paper Award in ISVLSI’20\, ICCAD’19\, ICCAD’20\, and IEEE CAS’ 20.\n\n\n\n \n \nZoom Information:\nJoin Zoom Meeting\nhttps://ufl.zoom.us /j/904047693\n\nMeeting ID: 904 047 693\n\nOne tap mobile\n+16465588656\,\ ,904047693# US (New York)\n+16699006833\,\,904047693# US (San Jose)\n\nDia l by your location\n+1 646 558 8656 US (New York)\n+1 669 900 6833 US (San Jose)\nMeeting ID: 904 047 693\nFind your local number: https://ufl.zoom. us/u/ab5VOI6m6G\n\nJoin by SIP\n904047693@zoomcrc.com\n\nJoin by H.323\n16 2.255.37.11 (US West)\n162.255.36.11 (US East)\n221.122.88.195 (China)\n11 5.114.131.7 (India Mumbai)\n115.114.115.7 (India Hyderabad)\n213.19.144.11 0 (EMEA)\n103.122.166.55 (Australia)\n209.9.211.110 (Hong Kong)\n64.211.14 4.160 (Brazil)\n69.174.57.160 (Canada)\n207.226.132.110 (Japan)\nMeeting I D: 904 047 693\n\nJoin by Skype for Business\nhttps://ufl.zoom.us/skype/90 4047693 ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2022/0 2/1572375654888.jpg CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VEVENT UID:78@mestcenter.org DTSTART;TZID=America/New_York:20220316T120000 DTEND;TZID=America/New_York:20220316T130000 DTSTAMP:20240905T133215Z URL:https://mestcenter.org/training/webinar-disruptnet-integrity-breach-of -deep-neural-network-execution/ SUMMARY:Webinar: DisruptNet: Integrity Breach of Deep Neural Network Execut ion DESCRIPTION:To watch the recorded webinar\, click on the recording.\nPlay V ideo\nSpeaker: \nDr. Yunsi Fei\, Northeastern University\nAbstract:\nSecu rity of deep neural network (DNN) inference engines\, i.e.\, trained DNN m odels on various platforms\, has become one of the biggest challenges in d eploying artificial intelligence in domains where privacy\, safety\, and r eliability are of paramount importance. In addition to classic software at tacks such as model inversion and evasion attacks\, recently a new attack surface-implementation attacks which include both passive side-channel att acks and active fault injection attacks-is arising\, targeting implementat ion peculiarities of DNNs to breach their confidentiality and integrity. T his talk focuses on several new active attacks of deep learning accelerato rs on different platforms\, FPGA and GPU\, resulting in image misclassific ation and integrity breach of deep neural network execution. Our new vecto r of attacks are first of their kind and reveal a largely under-explored a ttack surface of DNN inference engines. Insights gained during attack expl oration provide valuable guidance for effectively protecting DNN execution against integrity violations.\nSpeaker Bio:\n\n\nDr. Yunsi Fei is a Profe ssor of Electrical and Computer Engineering at Northeastern University\, B oston\, and directs the Northeastern University Energy-efficient and Secur e System (NUEESS) laboratory. She received her BS and MS degrees in Electr onic Engineering from Tsinghua University\, China\, in 1997 and 1999\, res pectively\, and her PhD degree in Electrical Engineering from Princeton Un iversity in 2004. Her recent research focuses on hardware-oriented securit y and trust\, side-channel attack analysis and countermeasures\, and secur e computer architecture and heterogeneous systems. She was a recipient of National Science Foundation CAREER award. She was a general co-chair for C HES (International Conference on Cryptographic Hardware and Embedded Syste ms) 2019. Currently she is the site director for an NSF Industry Universit y Research Cooperation Center - Center for Hardware and Embedded System Se curity and Trust (CHEST)\, and actively engaging with industry partners to address security needs arising in their products and applications.\n\n&nb sp\;\n\n \n \nZoom Information:\nJoin Zoom Meeting\nhttps://ufl.zoom.us/j/ 904047693\n\nMeeting ID: 904 047 693\n\nOne tap mobile\n+16465588656\,\,90 4047693# US (New York)\n+16699006833\,\,904047693# US (San Jose)\n\nDial b y your location\n+1 646 558 8656 US (New York)\n+1 669 900 6833 US (San Jo se)\nMeeting ID: 904 047 693\nFind your local number: https://ufl.zoom.us/ u/ab5VOI6m6G\n\nJoin by SIP\n904047693@zoomcrc.com\n\nJoin by H.323\n162.2 55.37.11 (US West)\n162.255.36.11 (US East)\n221.122.88.195 (China)\n115.1 14.131.7 (India Mumbai)\n115.114.115.7 (India Hyderabad)\n213.19.144.110 ( EMEA)\n103.122.166.55 (Australia)\n209.9.211.110 (Hong Kong)\n64.211.144.1 60 (Brazil)\n69.174.57.160 (Canada)\n207.226.132.110 (Japan)\nMeeting ID: 904 047 693\n\nJoin by Skype for Business\nhttps://ufl.zoom.us/skype/90404 7693 ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2022/0 2/yunsi-fei.jpg CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VEVENT UID:93@mestcenter.org DTSTART;TZID=America/New_York:20220406T120000 DTEND;TZID=America/New_York:20220406T130000 DTSTAMP:20240905T133327Z URL:https://mestcenter.org/training/fault-criticality-assessment-in-ai-acc elerators/ SUMMARY:Webinar: Fault Criticality Assessment in AI Accelerators DESCRIPTION:To watch the recorded webinar\, click on the recording.\nPlay V ideo\nSpeaker: \nDr. Krishnendu Chakrabarty\, John Cocke Distinguished Pr ofessor\, Chair of Department of Electrical and Computer Engineering Profe ssor of Computer Science Duke University\nAbstract:\nThe ubiquitous applic ation of deep neural networks (DNN) has led to a rise in demand for AI acc elerators. For example\, the Tensor Processing Unit from Google and its va riants are of considerable interest for DNN inferencing using AI accelerat ors.  DNN-specific functional criticality analysis identifies faults that cause measurable and significant deviations from acceptable requirements such as the inferencing accuracy. This talk will examine the problem of cl assifying structural faults in the processing elements (PEs) of systolic-a rray accelerators. The speaker will first analyze the impact of stuck-at f aults and present a two-tier machine-learning (ML) based method to assess the functional criticality of these faults. The problem of minimizing misc lassification will be addressed by utilizing generative adversarial networ ks (GANs). The two- tier ML/GAN-based criticality assessment method leads to less than 1% test escapes during functional criticality evaluation of s tructural faults. While supervised learning techniques can be used to accu rately estimate fault criticality\, it requires a considerable amount of g round truth for model training. The speaker will therefore present a neura l-twin framework for analyzing fault criticality with a negligible amount of ground-truth data. A recently proposed misclassification-driven trainin g algorithm will be used to sensitize and identify biases that are critica l to the functioning of the accelerator for a given application workload. The proposed framework achieves up to 100% accuracy in fault-criticality c lassification in 16-bit and 32-bit PEs by using the criticality knowledge of only 2% of the total faults in a PE.\n\nSpeaker Bio: \nKrishnendu Chak rabarty has been at Duke University since 1998. His current research is fo cused on: testing and design-for-testability of integrated circuits (espec ially 3D SOC)\; microfluidic biochips\; hardware security\; neuromorphic c omputing. His research projects in the past have also included digital pri nt and enterprise system optimization\, chip cooling using digital microfl uidics\, wireless sensor networks\, and real-time embedded systems. Resear ch support is provided by the National Science Foundation\, DARPA\, Semi conductor Research Corporation\, Air Force Research Labs\, Intel\, Synopsy s\, and IBM. Other sponsors in the past have included the Army Research Of fice\, National Institutes of Health\, Office of Naval Research\, Cisco\, and HP.\n\nProf. Chakrabarty is a recipient of the 1999 National Science Foundation Early Faculty (CAREER) Award\, the 2001 Office of Naval Researc h Young Investigator Award\, the Mercator Professor award from Deutsche Forschungsgemeinschaft\, Germany\, for 2000-2002\, and over a dozen best paper awards at top conferences. He is a recipient of Duke University's 2 008 Dean's Award for Excellence in Mentoring\, and a recipient of the 2010 Capers and Marion McDonald Award for Excellence in Mentoring and Advising \, Pratt School of Engineering\, Duke University. He was also awarded the Distinguished Alumnus Award by the Indian Institute of Technology\, Kharag pur\, in 2014. Prof. Chakrabarty has served as an ACM Distinguished Speake r\, a Distinguished Visitor of the IEEE Computer Society\, and a Distingui shed Lecturer of the IEEE Circuits and Systems Society. He is also a recip ient of the Humboldt Research Award (2013) and the Humboldt Research Fel lowship (2003)\, awarded by the Alexander von Humboldt Foundation\, Germa ny. He holds 18 US patents and has several pending US patents. He served a s Editor-in-Chief of IEEE Design &\; Test of Computers during 2010-20 12\, ACM Journal on Emerging Technologies in Computing Systems during 20 10-2015\, and IEEE Transactions on VLSI Systems during 2015-2018.\n\nPro f. Chakrabarty received the B. Tech. degree from the Indian Institute of T echnology\, Kharagpur\, India in 1990\, and the M.S.E. and Ph.D. degrees f rom the University of Michigan\, Ann Arbor in 1992 and 1995\, respectively \, all in Computer Science and Engineering . During 1990-95\, he was a r esearch assistant at the Advanced Computer Architecture Laboratory of the Department of Electrical Engineering and Computer Science\, University of Michigan. During 1995-1998\, he was an Assistant Professor of Electrical a nd Computer Engineering at Boston University.\n\n\n \;\n\n \n \nZoom I nformation:\nJoin Zoom Meeting\nhttps://ufl.zoom.us/j/904047693\n\nMeeting ID: 904 047 693\n\nOne tap mobile\n+16465588656\,\,904047693# US (New Yor k)\n+16699006833\,\,904047693# US (San Jose)\n\nDial by your location\n+1 646 558 8656 US (New York)\n+1 669 900 6833 US (San Jose)\nMeeting ID: 904 047 693\nFind your local number: https://ufl.zoom.us/u/ab5VOI6m6G\n\nJoin by SIP\n904047693@zoomcrc.com\n\nJoin by H.323\n162.255.37.11 (US West)\n 162.255.36.11 (US East)\n221.122.88.195 (China)\n115.114.131.7 (India Mumb ai)\n115.114.115.7 (India Hyderabad)\n213.19.144.110 (EMEA)\n103.122.166.5 5 (Australia)\n209.9.211.110 (Hong Kong)\n64.211.144.160 (Brazil)\n69.174. 57.160 (Canada)\n207.226.132.110 (Japan)\nMeeting ID: 904 047 693\n\nJoin by Skype for Business\nhttps://ufl.zoom.us/skype/904047693 ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2022/0 5/Krishnendu.jpg CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VEVENT UID:77@mestcenter.org DTSTART;TZID=America/New_York:20220420T120000 DTEND;TZID=America/New_York:20220420T130000 DTSTAMP:20240905T133625Z URL:https://mestcenter.org/training/hardware-security-functional-encryptio n-and-chip-authentication/ SUMMARY:Webinar: Hardware Security: Functional Encryption and Chip Authenti cation DESCRIPTION:To watch the recorded webinar\, click on the recording.\nPlay V ideo\nSpeaker: \nDr. Keshab Parhi\, Edgar F. Johnson Professor of Electro nic Communication\,  Distinguished McKnight University Professor\, Univer sity of Minnesota\nAbstract:\nThis talk will present approaches to functio nal obfuscation where the functionality is hidden by incorporating keys to a design such that the circuit only functions correctly if the key is cor rect. Various modes are introduced such that only the correct key triggers the correct functionality of the chip. One goal is to prevent foundries f rom manufacturing excess parts and third party vendors from selling in bla ck market. Another goal is to prevent theft of intellectual property. A th ird goal of obfuscation is to prevent reverse engineering. I will introduc e the notions of fixed and dynamic obfuscation. We will show that the time to find the key by trial and error can be increased exponentially with re spect to the number of key bits with dynamic obfuscation. In the second pa rt of the talk\, I will discuss chip authentication using physical unclona ble functions (PUFs). These are small circuits that can exploit manufactur ing process variations to generate unique signatures of chips. These uniqu e signatures\, in the form of challenge-response pairs\, can be stored in a server and can be used to authenticate devices. Various delay-based PUFs include multiplexer (MUX) PUF and ring-oscillator PUF. I will talk about modeling both linear and nonlinear MUX PUFs. We will show that both hard a nd soft responses of linear and nonlinear MUX PUFs can be modeled by artif icial neural network. I will then talk about XOR PUFs and feed-forward XOR PUFs that are more secure and attack resistant. I will briefly mention on going research on accelerators for homomorphic encryption.\nSpeaker Bio:\n \n\nKeshab K. Parhi received the Ph.D. degree in EECS from the University of California\, Berkeley\, in 1988. He has been with the University of Min nesota\, Minneapolis\, since 1988\, where he is currently Distinguished Mc Knight University Professor and Edgar F. Johnson Professor in the Departme nt of Electrical and Computer Engineering. He has published over 650 paper s\, has authored the textbook VLSI Digital Signal Processing Systems (Wile y\, 1999) and coedited the reference book Digital Signal Processing for Mu ltimedia Systems (Marcel Dekker\, 1999). His current research addresses VL SI accelerators for signal processing and machine learning including deep learning\, data-driven neuroscience\, hardware security and molecular comp uting. Dr. Parhi is the recipient of numerous awards including the 2003 IE EE Kiyo Tomiyasu Technical Field Award\, the 2017 Mac Van Valkenburg award \, and the 2012 Charles A. Desoer Technical Achievement award. He served a s the Editor-in-Chief of the IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS — PART I (2004-2005 term)\, and was an elected member of the Board of Govern ors of the IEEE Circuits and Systems society from 2005 to 2007. He is a Fe llow of IEEE\, ACM\, AAAS\, and NAI.\n\n \n \nZoom Information:\nJoin Zoom Meeting\nhttps://ufl.zoom.us/j/904047693\n\nMeeting ID: 904 047 693\n\nOn e tap mobile\n+16465588656\,\,904047693# US (New York)\n+16699006833\,\,90 4047693# US (San Jose)\n\nDial by your location\n+1 646 558 8656 US (New Y ork)\n+1 669 900 6833 US (San Jose)\nMeeting ID: 904 047 693\nFind your lo cal number: https://ufl.zoom.us/u/ab5VOI6m6G\n\nJoin by SIP\n904047693@zoo mcrc.com\n\nJoin by H.323\n162.255.37.11 (US West)\n162.255.36.11 (US East )\n221.122.88.195 (China)\n115.114.131.7 (India Mumbai)\n115.114.115.7 (In dia Hyderabad)\n213.19.144.110 (EMEA)\n103.122.166.55 (Australia)\n209.9.2 11.110 (Hong Kong)\n64.211.144.160 (Brazil)\n69.174.57.160 (Canada)\n207.2 26.132.110 (Japan)\nMeeting ID: 904 047 693\n\nJoin by Skype for Business\ nhttps://ufl.zoom.us/skype/904047693 ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2022/0 2/parhi.jpg CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VTIMEZONE TZID:America/New_York X-LIC-LOCATION:America/New_York BEGIN:STANDARD DTSTART:20191103T010000 TZOFFSETFROM:-0400 TZOFFSETTO:-0500 TZNAME:EST END:STANDARD BEGIN:DAYLIGHT DTSTART:20200308T030000 TZOFFSETFROM:-0500 TZOFFSETTO:-0400 TZNAME:EDT END:DAYLIGHT BEGIN:STANDARD DTSTART:20201101T010000 TZOFFSETFROM:-0400 TZOFFSETTO:-0500 TZNAME:EST END:STANDARD BEGIN:DAYLIGHT DTSTART:20210314T030000 TZOFFSETFROM:-0500 TZOFFSETTO:-0400 TZNAME:EDT END:DAYLIGHT BEGIN:STANDARD DTSTART:20211107T010000 TZOFFSETFROM:-0400 TZOFFSETTO:-0500 TZNAME:EST END:STANDARD BEGIN:DAYLIGHT DTSTART:20220313T030000 TZOFFSETFROM:-0500 TZOFFSETTO:-0400 TZNAME:EDT END:DAYLIGHT END:VTIMEZONE END:VCALENDAR