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Logic Locking Hands-on Training – MEST Center

1:00pm to 4:00pm EST

Thursday, May 14th, 2020

This training will be conducted online through Zoom due to COVID-19

Presenter: Dr. Domenic Forte, FICS Research / University of Florida

Who can attend: For Government and DIB Employees Only

To register email: Amanda Moscrip at amosc989@ufl.edu, include name, affiliation, and name of the organization.

Deadline: Register ASAP – Seating is limited.


Semiconductor globalization and outsourcing has facilitated intellectual property (IP) piracy, insertion of malicious circuits (i.e., hardware Trojans), and illegal manufacturing of ICs (i.e., overproduction). Further, with advances in the capabilities/automation of reverse engineering tools/software, it has become easier to recover critical IP, extract proprietary secrets, and launch attacks against critical missions and infrastructure. These are serious issues for government, industry, and society. Logic locking consists of techniques that lock an underlying semiconductor IP such that it can only be unlocked with a specific key. This can prevent adversaries from using the IP as a black-box, overproducing or overusing the IP, analyzing the IP for vulnerabilities, etc.

In this tutorial, the following topics will be covered: (1) Logic locking motivation, basic goals, and metrics; (2) Early digital locking techniques and limitations; (3) State-of-the-art locking techniques for digital and analog ICs; (4) Non-invasive (oracle and oracle-less) attacks against logic locking, based on satisfiability, VLSI testing, and machine learning; (5) Translation of attacks to ICs protected by camouflaging and split manufacturing; (6) Demonstration of state-of-the-art tools and assessment procedures.

Intended Learning Outcomes (ILOs)

Upon the completion of this webinar, trainees should be able to:

  • Understand and develop multiple logic locking approaches
  • Apply non-invasive attacks using in-house and open-source tools and benchmarks
  • Compare different logic locking methods in terms of their benefits, overheads, and resistance to attacks through hands-on practice

Target Audience

Design engineers, senior undergraduate students, graduate students, and decision-makers who are interested in understanding more about logic locking methods and attacks, developing their own methods, tools, and benchmarks, and learning about open-source tools.