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BEGIN:VCALENDAR VERSION:2.0 PRODID:-//wp-events-plugin.com//6.6.3//EN TZID:America/New_York X-WR-TIMEZONE:America/New_York BEGIN:VEVENT UID:133@mestcenter.org DTSTART;TZID=America/New_York:20191120T120000 DTEND;TZID=America/New_York:20191120T130000 DTSTAMP:20240901T193034Z URL:https://mestcenter.org/training/webinar-protecting-electronics-supply- chain-throughout-life-cycle/ SUMMARY:Webinar: Protecting Electronics Supply Chain Throughout Life Cycle DESCRIPTION:To watch the recorded webinar\, click on the recording.\nPlay V ideo \nSpeaker: \nDr. Mark Tehranipoor\, Intel Charles E. Young Preemine nce Endowed Chair Professor in Cybersecurity and the Chair of the Departme nt of Electrical and Computer Engineering (ECE) at the the University of F lorida\nAbstract:\nGrowing complexity of system-on-chip (SoC) and ever-inc reasing cost of IC fabrication have forced the semiconductor industry to s hift from a vertical business model to a horizontal model. In this model\, time-to-market and manufacturing costs are lowered through outsourcing an d design reuse. To be more specific\, SoC designers obtain licenses for th ird party intellectual property (3PIPs)\, design an SoC by integrating the 3PIPs with their own IPs\, and then outsource the SoC design to contract foundries and assemblies for fabrication\, test and packaging. With most o f these entities involved in design\, manufacturing\, integration\, and di stribution located across the globe\, original IP owners no longer have th e ability to monitor the entire process. The lack of trust and transparenc y/control has led to vulnerabilities such as IP piracy\, IC overproduction \, cloning\, tampering\, and more. To protect the supply chain from such v ulnerabilities\, academic and industry researchers have proposed many tech niques e.g.\, IP encryption\, logic obfuscation\, secure split test\, etc. However\, recent literature have pointed out to some of the limitations o f these approaches. In this webinar\, we will present complementary techni ques to provide an end-to-end solution to protecting electronic supply cha in.\n\n \;\nSpeaker Bio:\nMark M. Tehranipoor is currently the Intel C harles E. Young Preeminence Endowed Chair Professor in Cybersecurity and t he Chair of the Department of Electrical and Computer Engineering (ECE) at the the University of Florida. He is also currently serving as the Direct or for Florida Institute for Cybersecurity (FICS) Research\, Director for Edaptive Computing Inc. Transition Center (ECI-TC)\, Co-director for the A FOSR/AFRL Center of Excellence on Enabling Cyber Defense in Analog and Mix ed Signal Domain (CYAN)\, and Co-Director for the National Microelectronic Security Training Center (MEST). He also served as the Associate Chair fo r Research and Strategic Initiatives for the ECE Department from 2017-2019 and the Program Director of Cybersecurity in the Herbert Wertheim College of Engineering from 2019-2022. His current research projects include: har dware security and trust\, electronics supply chain security\, IoT securit y\, and reliable and testable VLSI design. Dr. Tehranipoor has published n umerous journal articles and refereed conference papers and has delivere d more than 220+ invited talks and keynote addresses. In addition\, he h as 15 patents issued\, and has published 13 books of which two are textboo ks. His projects have been sponsored by 50+ companies and Government agen cies.\n\nDr. Tehranipoor is a Fellow of IEEE\, Fellow of ACM\, Golden Core Member of IEEE Computer Society\, and Member of ACM SIGDA. He is also a m ember of the Connecticut Academy of Science and Engineering (CASE). He is a recipient of 14 best paper awards and nominations\, the 2009 NSF CAREER award\, the 2014 AFOSR MURI award on Nanoscale Security\, the 2008 IEEE Co mputer Society (CS) Meritorious Service award\, the 2012 and 2017 IEEE CS Outstanding Contribution\, the 2010 and 2016 IEEE TTTC/CS Most Successful Technical Event for co-founding and chairing HOST Symposium\, the 2018 IEE E HOST Hall of Fame Member\, the 2009 and 2014 UConn ECE Research Excellen ce award\, the 2012 UConn SOE Outstanding Faculty Advisor award\, the 2016 UF College of Engineering Excellence in Leadership award\, the 2016 UF EC E Research Excellence Award\, the 2020 UF’s College of Engineering Teach er/Scholar of the year award\, and the 2020 UF Innovation of the Year Awar d.\n\nHe serves on the program committee of more than a dozen leading conf erences and workshops. Prof. Tehranipoor served as the guest editor for JE TTA\, IEEE Design and Test of Computers\, ACM JETC\, and IEEE Computer Soc iety Computing Now. He served as Program Chair of the 2019 International T est Conference (ITC)\, Vice-program Chair of the 2018 ITC\, Program Chair of the 2007 IEEE Defect-Based Testing (DBT) workshop\, 2016 IEEE Internati onal Verification and Security Workshop (IVSW)\, Program Chair of the 2008 IEEE Defect and Data Driven Testing (D3T) workshop\, Co-program Chair of the 2008 International Symposium on Defect and Fault Tolerance in VLSI Sys tems (DFTS)\, General Chair for D3T-2009 and DFTS-2009\, and Vice-general Chair for NATW-2011\, General Chair for 2008-2009\, and 2021 IEEE HOST\, a nd General Chair for 2019-2021 IEEE PAINE Conference.\n\nOver the years\, he has led a number of major initiatives in the domain of microelectronics security and trust. He co-founded the IEEE International Symposium on Ha rdware-Oriented Security and Trust (HOST) and served as HOST-2008 and HOS T-2009 General Chair and continue to serve as Chair of the Steering Commit tee for HOST. He also co-founded IEEE Asian-HOST and the IEEE Internati onal Conference of Physical Assurance and Inspection of Electronics (PAINE ). Further\, he co-founded the Journal on Hardware and Systems Security ( HaSS) and currently serving as EIC for HaSS. He is also led development o f Trust-Hub sponsored by the National Science Foundation (NSF). He serve d as associate Editor-in-Chief (EIC) for IEEE Design and Test of Computers from 2012-2014. He is currently serving as an Associate Editor for IEEE D esign and Test of Computers\, JETTA\, Journal of Low Power Electronics (JO LPE)\, ACM Transactions for Design Automation of Electronic Systems (TODAE S)\, IEEE Transactions on Computers\, and IEEE Transactions on VLSI (TVLSI ). He has served as an IEEE Distinguished Speaker and an ACM Distinguished Speaker from 2010-2013. Further\, he served as an ambassador of cybersecu rity for IEEE from 2016-2020.\n\nPrior to joining University of Florida\, Dr. Tehranipoor served as the founding director of the Center for Hardware Assurance\, Security\, and Engineering (CHASE) and the Comcast Center of Excellence in Security Innovation (CSI) at the University of Connecticut. \n \nZoom Information:\nJoin Zoom Meeting\nhttps://ufl.zoom.us/j/904047693 \n\nMeeting ID: 904 047 693\n\nOne tap mobile\n+16465588656\,\,904047693# US (New York)\n+16699006833\,\,904047693# US (San Jose)\n\nDial by your lo cation\n+1 646 558 8656 US (New York)\n+1 669 900 6833 US (San Jose)\nMeet ing ID: 904 047 693\nFind your local number: https://ufl.zoom.us/u/ab5VOI6 m6G\n\nJoin by SIP\n904047693@zoomcrc.com\n\nJoin by H.323\n162.255.37.11 (US West)\n162.255.36.11 (US East)\n221.122.88.195 (China)\n115.114.131.7 (India Mumbai)\n115.114.115.7 (India Hyderabad)\n213.19.144.110 (EMEA)\n10 3.122.166.55 (Australia)\n209.9.211.110 (Hong Kong)\n64.211.144.160 (Brazi l)\n69.174.57.160 (Canada)\n207.226.132.110 (Japan)\nMeeting ID: 904 047 6 93\n\nJoin by Skype for Business\nhttps://ufl.zoom.us/skype/904047693 ATTACH;FMTTYPE=image/jpeg:https://mestcenter.org/wp-content/uploads/2022/0 8/MT.jpg CATEGORIES:Home Page,Webinars END:VEVENT BEGIN:VTIMEZONE TZID:America/New_York X-LIC-LOCATION:America/New_York BEGIN:STANDARD DTSTART:20191103T010000 TZOFFSETFROM:-0400 TZOFFSETTO:-0500 TZNAME:EST END:STANDARD END:VTIMEZONE END:VCALENDAR