Dr. Avesta Sasan
This talk will present approaches to functional obfuscation where the functionality is hidden by incorporating keys to a design such that the circuit only functions correctly if the key is correct. Various modes are introduced such that only the correct key triggers the correct functionality of the chip. One goal is to prevent foundries from manufacturing excess parts and third party vendors from selling in black market. Another goal is to prevent theft of intellectual property. A third goal of obfuscation is to prevent reverse engineering. I will introduce the notions of fixed and dynamic obfuscation. We will show that the time to find the key by trial and error can be increased exponentially with respect to the number of key bits with dynamic obfuscation. In the second part of the talk, I will discuss chip authentication using physical unclonable functions (PUFs). These are small circuits that can exploit manufacturing process variations to generate unique signatures of chips. These unique signatures, in the form of challenge-response pairs, can be stored in a server and can be used to authenticate devices. Various delay-based PUFs include multiplexer (MUX) PUF and ring-oscillator PUF. I will talk about modeling both linear and nonlinear MUX PUFs. We will show that both hard and soft responses of linear and nonlinear MUX PUFs can be modeled by artificial neural network. I will then talk about XOR PUFs and feed-forward XOR PUFs that are more secure and attack resistant. I will briefly mention ongoing research on accelerators for homomorphic encryption.
Keshab K. Parhi received the Ph.D. degree in EECS from the University of California, Berkeley, in 1988. He has been with the University of Minnesota, Minneapolis, since 1988, where he is currently Distinguished McKnight University Professor and Edgar F. Johnson Professor in the Department of Electrical and Computer Engineering. He has published over 650 papers, has authored the textbook VLSI Digital Signal Processing Systems (Wiley, 1999) and coedited the reference book Digital Signal Processing for Multimedia Systems (Marcel Dekker, 1999). His current research addresses VLSI accelerators for signal processing and machine learning including deep learning, data-driven neuroscience, hardware security and molecular computing. Dr. Parhi is the recipient of numerous awards including the 2003 IEEE Kiyo Tomiyasu Technical Field Award, the 2017 Mac Van Valkenburg award, and the 2012 Charles A. Desoer Technical Achievement award. He served as the Editor-in-Chief of the IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS —PART I (2004-2005 term), and was an elected member of the Board of Governors of the IEEE Circuits and Systems society from 2005 to 2007. He is a Fellow of IEEE, ACM, AAAS, and NAI.
Bookings are closed for this event.