Upcoming Course

Sign up now for our course entitled, "Fundamentals of Digital IC Design: From RTL to GDSII." The course will ensure a full understanding of the digital IC design flow and the entire transformation process of taking the design from RTL to the final bitstream on FPGA and GDSII on ASIC.

Register Here

MEST Center Hosts a Successful Certificate on Intro to HW Security

Read More

Thank you, speakers!

Upcoming Events

Date/Time Event
12/15/2021
12:00 - 13:00
Webinar: Security Attacks and Defenses of the Micro-Op Cache and the Processor Frontend
Dr. Jakub Szefer & Shuwen Deng