Objective: A physical unclonable function (PUF) is a circuit that exploits inherent randomness introduced during manufacturing to give a physical object a unique and unclonable ‘fingerprint’ or root-of-trust. This module provides a basic understanding of RO PUF design techniques in FPGAs, sources of error in PUF responses during measurement, approaches for reducing errors, and calculation of common PUF properties from PUF measurements.
Target Audience: Government officers, Scientists
Prerequisite Knowledge and Skills:
- programming knowledge: Verilog HDL, python, MATLAB
- Xilinx Vivado softwares
- A FPGA board experience
Resources Provided at the Training | Deliverables:
- Detailed description of set-ups used in training
- A video demo of the module
- Verilog scripts examples for analysis
Learning Outcome: By the end of this course and experiment, trainees will learn how to perform to design a PUF and analysis their performance using important performance metrics such as uniqueness, reliability, uniformity, and bit-aliasing.