Date(s) - 05/20/2020
12:00 - 13:00
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William Koven, Chip Lead at Facebook
This webinar will provide an overview of the most common asynchronous design techniques and their Power, Performance, Area, and Security (PPAS) tradeoffs with a focus on information leakage. This webinar will conclude with recommendations on when certain asynchronous approaches may be appropriate and provide superior PPAS to traditional synchronous design
William Koven is a Galois research engineer. Previously he was co-founder and CEO of Reduced Energy Microsystems (REM), a company focused on low power, high-performance edge computing. He received his B.S. in engineering from Harvey Mudd College, where he was a Clay-Wolkin Fellow. Prior to co-founding REM, William worked at AMD and at Intel in both product groups and Intel Labs. He has been involved in many production chip tapeouts as well as research chip development. He has also developed several novel asynchronous circuit architectures and continues to be heavily involved in the asynchronous design community.
Bookings are closed for this event.