Auburn University

Training Modules for Preventing IP Piracy

Due to the outsourced IC design and fabrication, the underlying hardware in various information systems that were once trusted can no longer be so. The untrusted chip fabrication and test facilities represent security threats to the current horizontal integration. One of the security threats posed by these entities is piracy of intellectual properties (IPs), where an entity in the supply chain can use, modify and/or sell functional IPs illegally as the untrusted foundry has access to all the mask information constructed from the GDSII or OASIS files and then reconstructs all the layers and the complete netlist with advanced tools. In addition, reverse engineering (RE) of ICs using state-of-the-art decapsulation tools and imaging can be exploited by an adversary to reconstruct the gate-level netlist from a chip.
Logic locking or obfuscation is a promising design-for-security solution to counter IP piracy, where chips are obfuscated with secret keys. The original circuit functionality is restored only when the correct key is programmed. Attackers cannot decode the original functionality even after extracting the netlist from RE. Logic locking promises to hide the inner details of a circuit by inserting a set of key gates. The key needs to be kept secret, and care must be taken during the design process so that this secret key is not leaked to the primary output directly during normal operation. However, the Boolean satisfiability-based attack (SAT attack) has effectively determined the secret key value and rendered initial locking schemes ineffective. Note, SAT-based attack is still the backbone for the oracle-guided attacks against post-SAT solutions.