Aging-Induced Data Imprints in SRAM: Exploiting Remanence for Data Recovery

Speaker 

Dr. Ujjwal Guin is a Godbold Associate Professor in the Department of Electrical and Computer Engineering at Auburn University.

Abstract

Data remanence in SRAM memories poses serious security risks to modern computing systems by allowing sensitive information to persist well beyond its intended lifetime. When electronic systems are decommissioned or discarded, embedded memories may retain previously stored confidential data, enabling adversaries to mount effective recovery attacks and potentially compromise sensitive information. These risks underscore the urgent need for robust, memory-aware sanitization mechanisms to ensure secure end-of-life disposal of electronic systems. This talk examines data remanence vulnerabilities in embedded memory technologies and motivates the development of practical, cost-effective sanitization techniques. The intended audience spans consumers, industry practitioners, and government stakeholders, with the goal of advancing methodologies that ensure deleted data remains irrecoverable across a product’s entire lifecycle. Specifically, this talk addresses the following objectives: (i) characterize aging-induced data imprinting mechanisms in SRAM at the device level; (ii) evaluate the efficacy of data recovery attacks across diverse SRAM technologies and technology nodes; and (iii) survey mitigation strategies and sanitization best practices that can be integrated into system design and end-of-life workflows.

Biography

Ujjwal Guin is currently an Associate Professor at the Department of Electrical and Computer Engineering at Auburn University. He received Bryghte D. and Patricia M. Godbold Associate Professorship for the highest research, teaching, and service achievements at Auburn University. He received his Ph.D. degree from the University of Connecticut in 2016. He is actively involved in projects in Hardware Security and Trust, Supply Chain Security, Cybersecurity, and VLSI Design and Test. He has developed several on-chip structures and techniques to improve the security, trustworthiness, and reliability of integrated circuits. He co-authored the book “Counterfeit Integrated Circuits: Detection and Avoidance.” He also authored two book chapters, over thirty journal articles, and forty refereed conference papers. His work has been recognized through several best paper nominations, awards, research grants, and prizes from various security competitions. One of his papers has been referenced in the “White House 100-Day Reviews under EO 14017” report, specifically in the context of “Building Resilient Supply Chains,” dated June 2021. His projects are sponsored by the United States Army, AFOSR, Secret Service, NSF, and AFRL. He currently serves and has served on the technical program committees of several reputed conferences, including DAC, HOST, VTS, PAINE, VLSID, GLSVLSI, ISVLSI, and Blockchain. He is the General Co-Chair of HOST and Program Co-Chair of ISVLSI, and previously served as Program Co-Chair for HOST 2025, PAINE 2024, and ATS 2024. He is a Senior Member of both the IEEE and ACM.