Automating Pre-silicon Security Verification: Static Security Auditing

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Speaker 

Dr. Md Rafid Muttaki, Senior R&D Engineer, Caspia Technologies

Abstract

As hardware designs grow in complexity, ensuring the security of these designs also grows in complexity. Vulnerabilities introduced during the design phase—whether accidental or malicious—can lead to devastating consequences, including IP theft, system compromise, and mission failure. Traditional verification methods often fall short in detecting subtle security flaws early in the design lifecycle.

This webinar will explore the methods for pre-silicon security verification and the importance of automation to scale out these capabilities in modern development lifecycles. It will also explore the role of static security checking as a quick, but powerful, verification technique for design teams to start looking for security weaknesses in early design stages.

Biography

Dr. Md Rafid Muttaki is currently a Senior R&D Engineer at Caspia Technologies, where he focuses on developing advanced solutions for hardware security verification and fault attack resilience. His research and engineering work span automated security property generation, fault analysis frameworks at RTL and gate level, and blockchain-based authentication of microelectronic components. Prior to joining Caspia Technologies, Dr. Muttaki was a Graduate Research Assistant in the Department of Electrical and Computer Engineering at the University of Florida, where he earned his Ph.D. in Electrical and Computer Engineering in 2023. His doctoral research concentrated on high-level synthesis security, hardware obfuscation, fault injection detection, and IP protection. Dr. Muttaki has authored over a dozen peer-reviewed publications in leading venues such as DAC, HOST, DATE, ITC, and IEEE Transactions, and holds a patent on a fault-tolerant converter sensor for low-overhead fault injection attack mitigation. He is an active reviewer and contributor in the hardware security community and a member of IEEE.