Objective: In this lab module, trainees will perform fault injection attacks, and examine the impacts of different FSM encoding schemes. The goal of this tutorial is to apply clock and voltage glitching to the CW305 Artix FPGA target, causing it to produce erroneous results during the AES encryption process. We demonstrate how to perform a clock and voltage glitch attacks on an AES block implemented on a FPGA, using the ChipWhisperer CW305 target board. Future steps are described for trainees looking to dig deeper into cryptographic attack methods.
Target Audience: Government officers, Scientists
Prerequisite Knowledge and Skills:
- programming knowledge: Verilog HDL
- Cadence Jaspergold, Xilinx Vivado softwares and FPGA board experience
- basic knowledge of AES cipher
Resources Provided at the Training | Deliverables:
- Detailed description of set-ups used in training
- A video demo of the module
- Verilog, python scripts examples for analysis
Learning Outcome: By end of this course trainees will understand the how fault injection attacks work in theory, and then how to apply clock and voltage glitching to the CW305 Artix FPGA target, causing it to produce erroneous results during the AES encryption process.