Date/Time
Date(s) - 09/10/2025
12:00 PM - 1:00 PM
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Speaker
Dipayan Saha is a Ph.D. candidate in Electrical and Computer Engineering at the University of Florida.
Abstract
Hardware security verification has become a critical bottleneck in modern system-on-chip (SoC) design, especially under aggressive time-to-market demands. Traditional methods rely heavily on manual effort and expert knowledge, making them resource-intensive, difficult to scale, and slow to adapt to evolving threats. Advancements in artificial intelligence (AI), particularly large language models (LLMs) and the rise of AI agents, present new opportunities to address these challenges.
This webinar will explore how emerging AI capabilities, particularly LLMs operating as intelligent agents, can transform hardware security verification. We will discuss how an agentic system can be developed to perform tasks such as security question answering, security asset identification, threat modeling, vulnerability detection, security property generation, and security-focused testbench creation through specialized AI agents. The session will cover methodologies including retrieval-augmented generation (RAG), prompting strategies, and parameter-efficient fine-tuning. Real-world demonstrations of an agentic assistant will show how these approaches enable automated, adaptable, and efficient verification flows. The webinar will conclude with a discussion of the future roadmap for AI-driven hardware security verification and its potential to reshape secure SoC design.
Biography
Dipayan Saha is a Ph.D. candidate in Electrical and Computer Engineering at the University of Florida. His research focuses on developing large language model (LLM)-based frameworks for hardware security verification solutions, as well as deep learning approaches for pre- and post-silicon side-channel analysis. He earned his M.Sc. in Electrical and Computer Engineering from the University of Florida and his B.Sc. in Electrical and Electronics Engineering from the Bangladesh University of Engineering and Technology (BUET). Prior to his current role at UF, Dipayan worked in both academia and industry. He has published extensively in leading journals and conferences. He has contributed to various technical societies and served significant roles in organizing different IEEE conferences. He is a member of IEEE, ACM and IACR.
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