Understanding EDA Solutions for Side Channel and Fault Injection Analysis

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Speaker 

Dr. Lang Lin is a Principal Product Manager at Ansys, part of Synopsys Inc., based in California, USA.

Abstract

Traditional post-silicon validation often detects side-channel and fault injection vulnerabilities too late leading to respin cost. In contrast, pre-silicon EDA simulation and analysis offer a proactive approach to identifying and mitigating implementation vulnerabilities early in the design phase.

This seminar will explore the capabilities of Ansys and Synopsys tools for design and multiphysics simulation, with a focus on IP and chip security assessment. Then you will learn a comprehensive side-channel leakage analysis flow—from RTL to layout level—tailored for cryptographic IP verification and signoff. Finally, we will demonstrate an innovative electromagnetic fault injection methodology designed to uncover and root-cause design weaknesses.

Biography

Dr. Lang Lin is a Principal Product Manager at Ansys, part of Synopsys Inc., based in California, USA. He leads the development of advanced methodologies for 3D-IC multiphysics simulation and security verification, serving global customers across the chip-to-system design spectrum. Prior to entering the EDA industry, Lang was a design engineer at Intel Corporation. He earned his Ph.D. in Computer Engineering from the University of Massachusetts. Lang has co-authored over 40 technical papers in leading conferences and journals focused on EDA, IC design, and hardware security, and has received Best Paper Awards from IEEE HOST, IEEE iSES, and DesignCon.