Date(s) - 10/19/2022
12:00 - 13:00
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Dr. Norman Chang, Ansys Fellow
The emerging need for physical design driven security simulation is motivated by an increasing number of hardware security threats including side-channel leakage analysis, clock/voltage glitching, laser-based fault injection, electromagnetic fault injection, and body bias fault injection. Pre-silicon security analysis and verification has become a critical consideration for almost all designs, including CPU, GPU, networking, IOT, and analog, mixed-signal designs. Security analysis relies on multiphysics simulations that can be further augmented by ML techniques to achieve reasonable performance, such that these security workflows can be incorporated into mainstream design signoff flows like timing, power noise, and physical verification. In this talk, we will cover RTL power, electromagnetic, and thermal side-channel analysis with ML-augmented techniques as proof-of-concept for comprehensive pre-silicon security signoff.
Norman Chang co-founded Apache Design Solutions in February 2001 and currently serves as Ansys Fellow and Chief Technologist of Electronics, Semiconductor, and Optics BU, ANSYS, Inc. He is also currently leading AI/ML and security initiatives at ANSYS. Prior to Apache, he lead a research group on the research of Power/Signal/Thermal Integrity of chipsets based on VLIW architecture at HP Labs. Dr. Chang received his Ph.D. in Electrical Engineering and Computer Sciences from University of California, Berkeley. He holds 23 patents and has co-authored over 60 technical papers and a popular book on “Interconnect Analysis and Synthesis” by Wiley-Interscience at 2000. He is currently in the committee of EDPS, ESDA-EDA and SI2 AI/ML SIG, and an IEEE Senior Member.
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