Dates
Dec 2, 2024 – August 31, 2025
Class Days
Online, Self-paced
Meeting Times
Office hours starting
December 30, 2024
Mondays 12n ET & Thursdays 3pm ET
80 Hours
Course Description
This intensive two-week course equips participants with essential knowledge and extensive hands-on experience in chip design, testing, and debugging, culminating in the fabrication of silicon chips. It is ideal for technical and non-technical individuals seeking to develop semiconductor design know-how. This course has been modified for lectures and labs to be taught asynchronously online, at your own pace; the two weeks to complete is an instructor-based guideline and is not mandatory.
This training consists of five modules and learners are presented with a Professional MEST Certificate upon completion.
Module 1: The Semiconductor Industry, An Overview
Module 2: Design Roles, Tools, Flows, and Methodologies
Module 3: Digital Logic Design and Tools
- Module 4: RISC-V CPU Design
- Module 5: Final Project (and a few hours, months later, after manufacturing)
No Prior Hardware Experience Required: We welcome participants with diverse backgrounds, as no prior experience with hardware is necessary.
Mode: Online, Asynchronous
If you have any questions, please contact Dr. Eslam Tawfik
Course Perquisites
No Prior Hardware Experience Required
Target Audience
DoD, Government, or Government Affiliated employees only. Must register with your organizational email, or currently be a member of the MEST Group on nanoHUB.
Registration
Registration is open!
Steve Hoover
Course Instructor
Steve is the founder of Redwood EDA, a startup focused on next-generation digital circuit design and the democratization of semiconductor technologies. He is actively driving forward the Transaction-Level Verilog standard and provides the Makerchip online IDE for open-source semiconductor design.
Formerly, as an engineer with DEC, Compaq, and Intel, Steve designed components for Alpha, Itanium, and x86 server CPUs and network architectures. Steve holds a BS in electrical engineering summa cum laude from Rensselaer Polytechnic Institute and an MS in computer science from the University of Illinois.
summary
Cloud-Based Learning
This course is delivered using web-based environments that incorporate open-source electronic design automation (EDA) solutions, ensuring accessibility and ease of use.
Semiconductor Industry
This course exposes the complex interactions between various players in the semiconductor ecosystem and the many roles and tools involved in designing and fabricating chips.
Digital Logic Design
Participants learn modern techniques in digital logic design, simulation, and debugging. They develop various digital circuits including a RISC-V CPU core.
ASIC and FPGA Development
In this course, participants design their own silicon for fabrication! Participants will prototype their designs using field-programmable gate arrays (FPGAs). They “tape-out” their designs, and subsequently, designs are fabricated, packaged, and integrated onto a printed circuit board!
Post-Silicon Validation
In addition to the main class lectures and labs, participants have the opportunity to engage in technical, bring-up, and validation session/s conducted on later days after receiving their fabricated silicon. The fabricated silicon will be mailed to the address you provided at registration.
sTUDENTS WILL:
- Learn digital logic design using schematic-style design (Wokwi) and HDL coding (Makerchip/TL-Verilog).
- Create: simple circuits, a calculator, a single-cycle RISC-V CPU, a pipelined RISC-V CPU.
- Become familiar with ASIC and FPGA flows.
- Implement a custom project for Tiny Tapeout such as:
- A customized RISC-V CPU/program.
- An enhanced calculator.
- A simple circuit of their own design.
sYLLABUS
Module 1: The Semiconductor Industry,
An Overview
Format: Lecture
Audience: This module is ideal for professionals across diverse roles within the semiconductor industry and related fields, including: Program Managers, Test Engineers, Product Engineers, Technicians, Technical Managers. Whether you are involved in project management, testing, product development, maintenance, or leadership, this module offers valuable insights and skills that are essential for success in the dynamic semiconductor industry landscape.
Topics:
- The world of microelectronics
- History and terminology of microelectronics
- Semiconductor supply chain
- Design, fabrication, assembly, and test
- Analog and Mixed Signal Designs
Module 2: Design Roles, Tools, Flows, and Methodologies
Format: Lecture
Audience: This module is well-suited for individuals interested in gaining knowledge about the entire semiconductor design cycle, regardless of whether they plan to engage in chip or circuit design professionally, as a hobby, or for educational purposes.
Topics:
- Design teams and roles
- Overview of design tools
- Design flows and methodologies
- Design languages
- Tool details
- Transaction-level design methodology
Module 3: Digital Logic Design and Tools
Format: Mini-lectures and numerous labs and activities
Audience: This module is appropriate for those who did not major in EE/ECE/CS in college who wish to enter into the world of digital logic design or for those who could use a refresher.
Topics:
- Digital Logic
- Introducing digital logic design including combinational logic, sequential logic, and pipelined logic
- Learning online digital design tools including the Wokwi and Makerchip platforms
- Exploring the journey from hardware description to silicon using the Tiny Tapeout flow
- Hands-on design using hardware prototyping with a field-programmable logic array (FPGA) based Tiny Tapeout evaluation board
- Programs and CPUs
- Compilers
- Assemblers and Disassemblers
- RISC-V instruction set architecture
- CPUs–hardware execution of instructions
Module 4: RISC-V CPU Design
Format: Series of mini-labs, leading to the implementation of a RISC-V CPU core
Audience: This module is a follow-on to Module 3. Those who majored in EE/ECE/CS in college may wish to skip Module 3 and begin their hands-on journey with this module.
Topics:
- A review/refresher of Module 3
- Building a single-cycle RISC-V subset CPU core
- Pipelining the RISC-V CPU core for higher performance
- Completing the CPU for most RISC-V (RV32I) instructions
- “Taping out” the CPU using Tiny Tapeout
- Project ideas, team formation, project selection
Module 5: Final Project
Format: Open projects
Audience: This module is for those who completed Module 3 and/or Module 4
Topics:
- Defining and implementing an individual or small-team final project to design a Tiny Tapeout ASIC
- Designing and debugging the project
- Taping out and submitting the design
- (Months later) Testing packaged and mounted parts on the Tiny Tapeout boards