This course focuses on architecture-level vulnerabilities, secure architecture design principles and applications to modern microprocessors. Recent attacks such a Specter and Meltdown have revealed fundamental vulnerabilities in the way we design high-end microprocessors that power a wide range of devices from smartphones to cloud servers and supercomputers. This course examines some of these vulnerabilities, countermeasures and new secure design principles.
Topics to be covered:
- Security vulnerabilities in speculative execution.
- Branch prediction, exceptions, prefetching attacks.
- Cache-based timing and covert channels.
- Coherence and multi-processor side channels.
- DRAM-based side channels, ORAM design.
- Emerging architectures
- GPU side channels.
- Designing secure special-purpose accelerators.
- Security as a first-class design constraint.
- RISC V based teaching platform, proof-of-concept exploits.