Phase 3, year 1
Courses
| Course ID | Course | Deadline | Received |
|---|---|---|---|
| C7 | Introduction to Advanced Packaging | 2/29/2024 | |
| C10 | Introduction to SoC Design | 1/16/2024 | |
| C11 | CAD for SoC Security | 1/31/2023 |
Modules
| ID | Lab Module | Main Tools/Equipment | Platform | Due Date | Received Date |
|---|---|---|---|---|---|
| M01 | Recycled FPGA Detection | Xilinx Vivado Design Suite | Spartan-3A (90nm) or Spartan-6 (45nm) | 2/23/2024 | |
| M04 | Hardware Trojan Insertion and Detection | Synopsys Design Compiler, TetraMAX, and in-house scripts | N/A | 2/23/2024 | |
| M07 | Physical Unclonable Function (PUF) (Simulation) | Cadence Virtuoso Analog Design Environment and Layout Suite, Matlab, NIST database | HSPICE | 2/23/2024 | |
| M11 | Physical Unclonable Function (PUF) (measurement) | Matlab, Tektronix TLA 7 Series, Agilent MA61 series | Xilinx 7 series FPGA (28nm) | 11/30/2023 | |
| M12 | Logic Obfuscation (measurement + imaging) | Matlab, Tektronix TLA 7 Series, Agilent MA61 series + (Navid to add optical imaging) | NA | 11/30/2023 | |
| M13 | CDIR Chip Odometer (measurement) | Matlab, Tektronix TLA 7 Series, Agilent MA61 series, Digital Oscilloscope, Keysight X-Series Spectrum Analyzer, Heat chamber | Xilinx 7 series FPGA (28nm) | 2/23/2024 | |
| M16 | Counterfeit IC Detection Using Optical Imaging | DSLR Camera and Leica microscope | DIP, QFP, flip chip, etc. packaged chips | 3/11/2024 | |
| M05 | FSM Fault Injection and Countermeasures | PHEMOS 1000 | Xilinx 7 series FPGA (28nm) | 12/15/2023 | |
| M08 | Power Side-Channel Analysis on AES (simulation) | Cadence Virtuoso Analog Design Environment and Layout Suite, Matlab | Synopsys | 12/15/2023 | |
| M18 | Counterfeit PCB Detection Using Optical Imaging 1 | DSLR Nikon camera+ Python and MATLAB | Xilinx Sparta 6 | 3/11/2024 | |
| M46 | Development of a Basic System-on-Chip Architecture in FPGA | 3/29/2024 | |||
| M47 | Introduction to SoC – System Integration and Interconnects | 3/29/2024 | |||
| M03 | Power/EM Analysis on AES | Matlab,Tektronix TDS6604B, and Langer EMV RF-K 7-4 near-field probe | MEST SoC (22nm) | 1/30/2024 | |
| M09 | Logic Obfuscation (Simulation/layout) | Cadence Virtuoso Analog Design Environment and Layout Suite, Matlab | Synopsys | 2/23/2024 | |
| M19 | Counterfeit PCB Detection Using Optical Imaging 2 | DSLR Nikon camera+Python and MATLAB | Xilinx Sparta 6 | 3/11/2024 | |
| M17 | X-ray 3D Tomography Training | Skyscan 2211 | 4 layer customized PCB | 3/11/2024 | |
| M22 | Modeling with Platform Architect | 3/29/2024 | |||
| M23 | Test and Verification of a System-on-chip (SoC) (Measurement) | Summit 12000B Semi-Automated Probe- Station with Nanoprober/SEM, Tektronix Logic Analyzers and Oscilloscopes, PHEMOS | MEST SoC (22nm), | 2/28/2024 | |
| M48 | Property Based Security Verification | Synopsys VC Formal Cadence JasporGold EBC model checker Yosys and SAT solvers (e.g., minisat) | | 2/28/2024 | 2/23/2024 |
| M20 | Counterfeit PCB Detection Using X-ray Imaging | Skyscan 2211 | Smartwatch board and Iotech board | 3/11/2024 | |
| M14 | Scanning Electron Microscope Training | TESCAN LYRA and FERA | AMD Opteron 65 nm | 3/11/2024 | |
| M21 | Near-field Terahertz Imaging | Protemics THz imaging machine | DIP, QFP, flip chip, etc. packaged chips | 3/31/2024 | |
| M02 | Optical Probing Assessment on Logic Locking | PHEMOS 1000 | iPROBE chip (65nm) | 3/31/2024 | |
| M15 | Hardware Trojan Detection in ICs Using SEM Images | TESCAN LYRA and FERA+ | AMD Opteron 65 nm and Smart Card 130 nm | 3/11/2024 | |
| M06 | Mixed-Signal Side-Channel leakage (simulation) | Cadence Virtuoso Analog Design Environment and Layout Suite | NA | 3/31/2024 | |
| M10 | Mixed-Signal Side-Channel leakage (measurement) | Matlab, Tektronix TLA 7 Series, Agilent MA61 series, Digital Oscilloscope, Keysight X-Series Spectrum Analyzer | NA | 3/31/2024 | |
| M49 | Introduction to Time to digital convertor (TDC) sensor design | | | 3/29/2024 | |
| M50 | Cache-based Micro-architectural Attacks | | | 3/29/2024 | |
| M51 | SoC verification at high level using SystemC-UVM | | | 3/29/2024 | |
| M55 | Basic Verification Methodology | 3/29/2024 | |||
| M56 | Fault Injection Attack on AES Chipher | 3/29/2024 | |||
| M57 | RO based TRNG | 3/29/2024 |
Phase 3, year 2
Courses
| Course ID | Course | Deadline | Received |
|---|---|---|---|
| C20 | CAD for Hardware Security Verification | 03/2025 | FF |
| C21 | Physical Attacks and Inspection of Electronics | 08/22/2024 | NA |
| C22 | Introduction to SoC Design | 01/20/2025 | CB |
Modules
| ID | Lab Module | Main Tools/Equipment | Platform | Due Date | Received Date |
|---|---|---|---|---|---|
| M60 | Security Policy Definition and eFPGA Implementation for AES Denial-of-Service (DoS) and Information Leakage Vulnerabilities | MT | 01/15/2025 | 03/18/2025 | |
| M61 | Security Property Development and Fault-Injection Simulation | MT | 01/15/2025 | 03/18/2025 | |
| M62 | Hardware Bug Detection with Large Language Model | MT | 01/15/2025 | 03/18/2025 | |
| M63 | Security Question Answering through Retrieval-Augmented Generation | MT | 01/15/2025 | 03/18/2025 | |
| M64 | Hardware Emulation based Fault Injection Assessment | FF | 01/15/2025 | 03/18/2025 | |
| M65 | Introduction to Hardware Emulation | FF | 01/15/2025 | 03/18/2025 | |
| M66 | Resolution and Texture | NA | 10/15/2024 | 10/15/2024 | |
| M67 | X-ray Tomography | NA | 11/15/2024 | 11/26/2024 | |
| M68 | Introduction to PetaLinux – Embedded Operating Systems | CB | 10/15/2024 | 10/23/2024 | |
| M69 | Multi Processor Integration | CB | 11/15/2024 | 12/10/2024 | |
Phase 3, year 3
Modules
| ID | Lab Module | Main Tools/Equipment | Platform | Due Date | Received Date |
|---|---|---|---|---|---|
| M99 | LLM based testbench generation for bug detection | FF | 09/30/2025 | 09/30/2025 | |
| M100 | Security property generation using LLM | FF | 10/22/2025 | 10/30/2025 | |
| M101 | Threat modeling and test plan generation using LLM | FF | 10/22/2025 | 12/24/2025 | |
| M102 | Introduction to hardware runtime monitoring | FF | 12/22/2025 | 10/30/2025 | |
| M103 | Security asset identification using LLM | MT | 09/30/2025 | 09/30/2025 | |
| M104 | Introduction to Simulation Based Fuzzing | MT | 10/22/2025 | 11/03/2025 | |
| M105 | Introduction to Emulation-based Fuzzing | MT | 10/22/2025 | 01/06/2026 | |
| M106 | Best Practices for LLM-Generated HDL | MT | 12/22/2025 | 01/08/2026 | |
Phase 3, year 4
Modules
| ID | Lab Module | Main Tools/Equipment | Platform | Due Date | Received Date |
|---|---|---|---|---|---|
| M135 | Introduction to HDL Linting | MT | |||
| M136 | EDA tool for HDL Linting | MT | |||
| M137 | LLM based HDL Linting | MT | |||
| M138 | RTL Code generation using LLM | MT | |||
| M139 | Design modification using LLM | MT | |||
| M140 | Design specification generation from RTL using LLM | MT | |||
| M141 | Agentic Security Validation through Test Generation | FF | |||
| M142 | Agentic Automated RTL Debugging and Root Causing | FF | |||
| M143 | Agentic Automated RTL Countermeasure Development | FF | |||
| M142 | Agentic Linting Result Grouping and Assessment | FF | |||
| M145 | Agentic Concolic Testing with Security Coverage | FF | |||
| M146 | Agentic based Equivalent Checking and Countermeasure Developments | FF | |||
| M147 | LLM assisted runtime monitoring Design I | FF | |||
| M148 | LLM assisted runtime monitoring Design II | FF |