Date/Time
Date(s) - 08/17/2026 - 09/14/2026
12:00 PM - 1:30 PM
Abstract
This comprehensive training provides a deep dive into the principles and practices of advanced semiconductor packaging, emphasizing System Technology Co-Optimization (STCO) and workload-driven architecture. As the industry moves beyond traditional Moore’s Law scaling, advanced packaging has become critical for integrating disaggregated “chiplets” into a single, high-performance system-level device. Part I covers the entire STCO workflow, from architectural partitioning and materials science to manufacturing, thermal management, and reliability. Part II covers advanced packaging components, process flows, architectures, and emerging technologies. Participants will gain a thorough understanding of the key technologies and system-level trade-offs driving the future of microelectronics for applications like AI, high-performance computing (HPC), and 5G/6G communications.
Instructor
Tom McCune (M.S. & B.S. in Materials Science & Engineering, Cornell University) is a former advanced packaging R&D engineer at Intel and has supported national-scale semiconductor initiatives under the CHIPS and Science Act through Natcast, where he focused on advanced packaging opportunities for AI, HPC, and data center systems and evaluated emerging U.S. startups. He brings extensive experience in substrate and interposer process development, 2.5D/3D heterogeneous integration, hybrid bonding, glass panel substrates, and materials R&D, bridging research, pilot-line development, and manufacturing scale-up. At Intel, he led pathfinding and integration efforts for EMIB and Foveros technologies, drove next-generation solder resist development for interconnect scaling, and supported manufacturing readiness for advanced glass substrate programs, contributing to early demonstrations of 3D packaging with glass core substrates. His work spans technical strategy, process integration, and cross-functional engineering collaboration across design, assembly, and supply chain ecosystems.
Institution:
Semitech Insights. https://semitech-insights.com ( operated under Insights Technology Strategies LLC, an Arizona limited liability company)
Target Audience
Designed for U.S. citizens working in the Department of War, Government, or Government-affiliated employees, industry, as well as college students and faculty. Must register with your organizational email, and will be notified of acceptance within one week of the course start date.
Course Details
12:00 PM – 1:30 PM ET (9:00 AM – 10:30 AM PDT/MST)
August 17, 2026 – September 10, 2026 – (Mondays, Thursdays)
Week 1: Aug 17, 20
Week 2: Aug 24, 27
Week 3: Aug 31, Sep 3
Week 4: Sep 10, 14 (No class on September 7 due to Labor Day)
Synchronous over Zoom
12 hours | 4 weeks | 1.5-hour lectures, 2x per week
