From Silicon to Systems: The Art of Digital Semiconductor Verification and Software Development

Abstract

Development and verification of increasingly complex hardware and software is a significant challenge for semiconductor, commercial and defense industrial base companies as they develop next-generation wireless, consumer, defense and automotive devices. Successfully creating a sophisticated digital semiconductor chip requires multiple forms of verification, and software development must be enabled early in the process to meet aggressive project schedules. This learning event will introduce you to the digital semiconductor validation and software development flow by describing the concepts of architecture exploration, functional verification, virtual prototyping, hardware-assisted verification techniques (hardware prototyping and emulation), and how these concepts and techniques address advanced semiconductor design and early software development challenges.

Instructor

This training is a collaboration between MEST and Synopsys

Target Audience

DoD, Government or Government Affiliated employees only. Must register with your organizational email and currently be a member of the MEST Group on nanoHUB. There are limited seats for this course; acceptance will be sent by email.

This introductory class is meant for engineers and managers that want to understand the role of microelectronics and semiconductor design as part of the electronics development flow. We will focus on methodologies and design flows from system requirements through architecture analysis, semiconductor verification and software development. Attendees should have a basic or intermediate understanding of electronics development. Have you heard of C++, SystemC, Verilog, VHDL, simulation, emulation or prototyping, this class is for you.

Course Details

There are limited seats for this training. You will receive an email with approved registration prior to the training. Virtual Instructor-Led Training, 9:00 am – 4:30 pm EDT (includes two 15-min breaks and a 45-60 min lunch break)

4 Day course on Hardware/Software Development and Verification

• Day 1 – Introductions and Demos: Virtualization – Simulation – Emulation – Prototyping
• Day 2 – Virtualization (Platform Architect and Virtualizer)
• Day 3 – Functional Verification (Verification Continuum)
• Day 4 – Hardware-Assisted Verification (ZeBu and HAPS)

Location: Online, Synchronous

If you have any questions, please contact Dr. Eslam Tawfik

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