Prof Eslam Tawfik
Prof. Eslam Tawfik is currently a research professor at The Ohio State University. His research topics focus on Digital SoC Design, Hardware Security and Trust, Non Von-Neumann Architecture, Neuromorphic Computing, Post-Quantum Cryptography, Low-Power Resilient ICs, Hardware Emulation, and CAD methods. He has solid digital design experience targeting FPGAs and ASICs, where he worked on different technology nodes to fabricate large number of SoCs. He also has solid teaching experience in digital design, computer engineering, and computer science curriculums.
Intended Learning Outcomes (ILOs)
Upon the completion of this course, trainees should be able to:
- Holistically understand digital design flow (from the specification phase to the signoff checks).
- Learn all transformations occur during the design flow and analyze their effect on performance metrics.
- Gain knowledge on different technology files and standard cell views.
- Identify different design flows based on the target implementation technology (ASIC vs. FPGA).
- Understand timing-analysis and timing-closure in different design phases.
- Understand chip level planning (Power Distribution Network, IO, Global Signals, etc).
- Design meaningful digital blocks starting from RTL and taking them to Bitstream or GDSII.